enum snd_soc_control_type control_type;
};
+static int wm8940_volatile_register(struct snd_soc_codec *codec,
+ unsigned int reg)
+{
+ switch (reg) {
+ case WM8940_SOFTRESET:
+ return 1;
+ default:
+ return 0;
+ }
+}
+
static u16 wm8940_reg_defaults[] = {
0x8940, /* Soft Reset */
0x0000, /* Power 1 */
ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
break;
case SND_SOC_BIAS_STANDBY:
+ if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
+ ret = snd_soc_cache_sync(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
+ return ret;
+ }
+ }
+
/* ensure bufioen and biasen */
pwr_reg |= (1 << 2) | (1 << 3);
/* set vmid to 300k for standby */
static int wm8940_resume(struct snd_soc_codec *codec)
{
- int i;
- int ret;
- u8 data[3];
- u16 *cache = codec->reg_cache;
-
- /* Sync reg_cache with the hardware
- * Could use auto incremented writes to speed this up
- */
- for (i = 0; i < ARRAY_SIZE(wm8940_reg_defaults); i++) {
- data[0] = i;
- data[1] = (cache[i] & 0xFF00) >> 8;
- data[2] = cache[i] & 0x00FF;
- ret = codec->hw_write(codec->control_data, data, 3);
- if (ret < 0)
- goto error_ret;
- else if (ret != 3) {
- ret = -EIO;
- goto error_ret;
- }
- }
- ret = wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
-
-error_ret:
- return ret;
+ wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+ return 0;
}
static int wm8940_probe(struct snd_soc_codec *codec)
.reg_cache_size = ARRAY_SIZE(wm8940_reg_defaults),
.reg_word_size = sizeof(u16),
.reg_cache_default = wm8940_reg_defaults,
+ .volatile_register = wm8940_volatile_register,
};
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)