ARM: dts: vf610-colibri: enable display controller
authorStefan Agner <stefan@agner.ch>
Tue, 5 Apr 2016 05:28:40 +0000 (22:28 -0700)
committerShawn Guo <shawnguo@kernel.org>
Wed, 13 Apr 2016 09:42:47 +0000 (17:42 +0800)
Enable dcu node which is used by the DCU DRM driver. Assign the 5.7"
EDT panel with VGA resolution which Toradex sells often with the
evaluation board.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
arch/arm/boot/dts/vf-colibri.dtsi

index 4d8b7f69353551b1c065d4a27d5609bf6266fff3..a8a8e434fb2717560bf80959794560015c5cc3fb 100644 (file)
                clock-frequency = <16000000>;
        };
 
+       panel: panel {
+               compatible = "edt,et057090dhu";
+               backlight = <&bl>;
+       };
+
        reg_3v3: regulator-3v3 {
                compatible = "regulator-fixed";
                regulator-name = "3.3V";
        status  = "okay";
 };
 
+&dcu0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_dcu0_1>;
+       fsl,panel = <&panel>;
+       status = "okay";
+};
+
 &dspi1 {
        status = "okay";
 
        vin-supply = <&reg_3v3>;
 };
 
+&tcon0 {
+       status = "okay";
+};
+
 &uart0 {
        status = "okay";
 };
index fda7f28101e1ca547acf8c765b6e7341842fb2e1..afcc43d2fa5ca6a8373ce0f215d6b50e400e3ae6 100644 (file)
                        >;
                };
 
+               pinctrl_dcu0_1: dcu0grp_1 {
+                       fsl,pins = <
+                               VF610_PAD_PTE0__DCU0_HSYNC      0x1902
+                               VF610_PAD_PTE1__DCU0_VSYNC      0x1902
+                               VF610_PAD_PTE2__DCU0_PCLK       0x1902
+                               VF610_PAD_PTE4__DCU0_DE         0x1902
+                               VF610_PAD_PTE5__DCU0_R0         0x1902
+                               VF610_PAD_PTE6__DCU0_R1         0x1902
+                               VF610_PAD_PTE7__DCU0_R2         0x1902
+                               VF610_PAD_PTE8__DCU0_R3         0x1902
+                               VF610_PAD_PTE9__DCU0_R4         0x1902
+                               VF610_PAD_PTE10__DCU0_R5        0x1902
+                               VF610_PAD_PTE11__DCU0_R6        0x1902
+                               VF610_PAD_PTE12__DCU0_R7        0x1902
+                               VF610_PAD_PTE13__DCU0_G0        0x1902
+                               VF610_PAD_PTE14__DCU0_G1        0x1902
+                               VF610_PAD_PTE15__DCU0_G2        0x1902
+                               VF610_PAD_PTE16__DCU0_G3        0x1902
+                               VF610_PAD_PTE17__DCU0_G4        0x1902
+                               VF610_PAD_PTE18__DCU0_G5        0x1902
+                               VF610_PAD_PTE19__DCU0_G6        0x1902
+                               VF610_PAD_PTE20__DCU0_G7        0x1902
+                               VF610_PAD_PTE21__DCU0_B0        0x1902
+                               VF610_PAD_PTE22__DCU0_B1        0x1902
+                               VF610_PAD_PTE23__DCU0_B2        0x1902
+                               VF610_PAD_PTE24__DCU0_B3        0x1902
+                               VF610_PAD_PTE25__DCU0_B4        0x1902
+                               VF610_PAD_PTE26__DCU0_B5        0x1902
+                               VF610_PAD_PTE27__DCU0_B6        0x1902
+                               VF610_PAD_PTE28__DCU0_B7        0x1902
+                       >;
+               };
+
                pinctrl_dspi1: dspi1grp {
                        fsl,pins = <
                                VF610_PAD_PTD5__DSPI1_CS0               0x33e2