crypto: caam - Set last bit on src SG list
authorHerbert Xu <herbert@gondor.apana.org.au>
Thu, 18 Jun 2015 06:25:56 +0000 (14:25 +0800)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 19 Jun 2015 06:16:32 +0000 (14:16 +0800)
The new aead_edesc_alloc left out the bit indicating the last
entry on the source SG list.  This patch fixes it.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/caam/caamalg.c

index 789c385f2e47341efc7c6e2bb9d33c722f38e3cb..daca933a82ec9ea1c918a868516e859ffcdbca98 100644 (file)
@@ -2624,7 +2624,7 @@ static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
 
        sec4_sg_index = 0;
        if (!all_contig) {
-               sg_to_sec4_sg(req->src, src_nents,
+               sg_to_sec4_sg_last(req->src, src_nents,
                              edesc->sec4_sg + sec4_sg_index, 0);
                sec4_sg_index += src_nents;
        }