[ARM] 4130/1: Add L220 support to RealView/EB
authorCatalin Marinas <catalin.marinas@arm.com>
Mon, 5 Feb 2007 13:48:24 +0000 (14:48 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 15 Feb 2007 15:08:54 +0000 (15:08 +0000)
This patch enables the L220 on the RealView/EB MPCore platform.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-realview/Kconfig
arch/arm/mach-realview/realview_eb.c
include/asm-arm/arch-realview/platform.h

index 68bc6b226ec77bca2571651565ea414201355440..35156ca39df77e6a62414f30f879119e12b513df 100644 (file)
@@ -10,6 +10,7 @@ config MACH_REALVIEW_EB
 config REALVIEW_MPCORE
        bool "Support MPcore tile"
        depends on MACH_REALVIEW_EB
+       select CACHE_L2X0
        help
          Enable support for the MPCore tile on the Realview platform.
          Since there are device address and interrupt differences, a
index effe243454e04b613b55ab1b844daba9b643f29a..3dba666151dbb7be39bc22757701adacc012a447 100644 (file)
@@ -31,6 +31,7 @@
 #include <asm/mach-types.h>
 #include <asm/hardware/gic.h>
 #include <asm/hardware/icst307.h>
+#include <asm/hardware/cache-l2x0.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -69,6 +70,11 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
                .pfn            = __phys_to_pfn(REALVIEW_GIC1_DIST_BASE),
                .length         = SZ_4K,
                .type           = MT_DEVICE,
+       }, {
+               .virtual        = IO_ADDRESS(REALVIEW_MPCORE_L220_BASE),
+               .pfn            = __phys_to_pfn(REALVIEW_MPCORE_L220_BASE),
+               .length         = SZ_8K,
+               .type           = MT_DEVICE,
        },
 #endif
        {
@@ -170,6 +176,11 @@ static void __init realview_eb_init(void)
 {
        int i;
 
+#ifdef CONFIG_REALVIEW_MPCORE
+       /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
+        * Bits:  .... ...0 0111 1001 0000 .... .... .... */
+       l2x0_init(__io_address(REALVIEW_MPCORE_L220_BASE), 0x00790000, 0xfe000fff);
+#endif
        clk_register(&realview_clcd_clk);
 
        platform_device_register(&realview_flash_device);
index 87acd9c191e63a220a3984e2edf8285754f7cfd8..6e0eab95a3a2ed3b8de1a0ae9044e5bc78c193c9 100644 (file)
 #define REALVIEW_TWD_BASE              0x10100700
 #define REALVIEW_TWD_SIZE              0x00000100
 #define REALVIEW_GIC_DIST_BASE         0x10101000      /* Generic interrupt controller distributor */
+#define REALVIEW_MPCORE_L220_BASE      0x10102000      /* L220 registers */
 #define REALVIEW_MPCORE_SYS_PLD_CTRL1 0xD8             /*  Register offset for MPCore sysctl */
 #else
 #define REALVIEW_MPCORE_SCU_BASE      0x1F000000       /*  SCU registers */
 #define REALVIEW_TWD_BASE             0x1F000700
 #define REALVIEW_TWD_SIZE             0x00000100
 #define REALVIEW_GIC_DIST_BASE        0x1F001000       /* Generic interrupt controller distributor */
+#define REALVIEW_MPCORE_L220_BASE     0x1F002000       /* L220 registers */
 #define REALVIEW_MPCORE_SYS_PLD_CTRL1 0x74             /*  Register offset for MPCore sysctl */
 #endif
 #define REALVIEW_GIC1_CPU_BASE        0x10040000       /* Generic interrupt controller CPU interface */