drm/i915/cmdparser: Make initialisation failure non-fatal

If the developer adds a register in the wrong order, we BUG during boot.
That makes development and testing very difficult. Let's be a bit more
friendly and disable the command parser with a big warning if the tables
are invalid.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20160818161718.27187-31-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index e586e15e172f0a1c584c1e5f7ff717ae37fdcaa9..808d97646e70ded0d3342cdb0d107c46020e061e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -746,17 +746,15 @@ static void fini_hash_table(struct intel_engine_cs *engine)
  * Optionally initializes fields related to batch buffer command parsing in the
  * struct intel_engine_cs based on whether the platform requires software
  * command parsing.
- *
- * Return: non-zero if initialization fails
  */
-int intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
+void intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
 {
        const struct drm_i915_cmd_table *cmd_tables;
        int cmd_table_count;
        int ret;
 
        if (!IS_GEN7(engine->i915))
-               return 0;
+               return;
 
        switch (engine->id) {
        case RCS:
@@ -811,24 +809,27 @@ int intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
                break;
        default:
                MISSING_CASE(engine->id);
-               BUG();
+               return;
        }
 
-       BUG_ON(!validate_cmds_sorted(engine, cmd_tables, cmd_table_count));
-       BUG_ON(!validate_regs_sorted(engine));
-
-       WARN_ON(!hash_empty(engine->cmd_hash));
+       if (!validate_cmds_sorted(engine, cmd_tables, cmd_table_count)) {
+               DRM_ERROR("%s: command descriptions are not sorted\n",
+                         engine->name);
+               return;
+       }
+       if (!validate_regs_sorted(engine)) {
+               DRM_ERROR("%s: registers are not sorted\n", engine->name);
+               return;
+       }
 
        ret = init_hash_table(engine, cmd_tables, cmd_table_count);
        if (ret) {
-               DRM_ERROR("CMD: cmd_parser_init failed!\n");
+               DRM_ERROR("%s: initialised failed!\n", engine->name);
                fini_hash_table(engine);
-               return ret;
+               return;
        }
 
        engine->needs_cmd_parser = true;
-
-       return 0;
 }
 
 /**

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9386523464ead9623c3409b73b0836e14e705c49..299949d54dca19ea10078a4725ed9bfc1251d4e6 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3541,7 +3541,7 @@ const char *i915_cache_level_str(struct drm_i915_private *i915, int type);
 
 /* i915_cmd_parser.c */
 int i915_cmd_parser_get_version(struct drm_i915_private *dev_priv);
-int intel_engine_init_cmd_parser(struct intel_engine_cs *engine);
+void intel_engine_init_cmd_parser(struct intel_engine_cs *engine);
 void intel_engine_cleanup_cmd_parser(struct intel_engine_cs *engine);
 bool intel_engine_needs_cmd_parser(struct intel_engine_cs *engine);
 int intel_engine_cmd_parser(struct intel_engine_cs *engine,

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 8a27bb9f6bc168635e9a1e2e7ad1d535f7740732..2e96a86105c2fa91550422b3016fe2f9190af1a3 100644 (file)
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -239,6 +239,8 @@ void intel_engine_setup_common(struct intel_engine_cs *engine)
        intel_engine_init_requests(engine);
        intel_engine_init_hangcheck(engine);
        i915_gem_batch_pool_init(engine, &engine->batch_pool);
+
+       intel_engine_init_cmd_parser(engine);
 }
 
 int intel_engine_create_scratch(struct intel_engine_cs *engine, int size)
@@ -301,7 +303,7 @@ int intel_engine_init_common(struct intel_engine_cs *engine)
        if (ret)
                return ret;
 
-       return intel_engine_init_cmd_parser(engine);
+       return 0;
 }
 
 /**
@@ -315,7 +317,7 @@ void intel_engine_cleanup_common(struct intel_engine_cs *engine)
 {
        intel_engine_cleanup_scratch(engine);
 
-       intel_engine_cleanup_cmd_parser(engine);
        intel_engine_fini_breadcrumbs(engine);
+       intel_engine_cleanup_cmd_parser(engine);
        i915_gem_batch_pool_fini(&engine->batch_pool);
 }