[9610] soc: samsung: cal-if: Updated PMUCAL data. (0713)
authoryi jaeuk <ju.yi@samsung.com>
Wed, 4 Jul 2018 06:49:34 +0000 (15:49 +0900)
committerSunyoung Kang <sy0816.kang@samsung.com>
Mon, 23 Jul 2018 08:04:55 +0000 (17:04 +0900)
Change-Id: Ibb5f0afa5c336882efae150c6da5be3d66e80480
Signed-off-by: yi jaeuk <ju.yi@samsung.com>
drivers/soc/samsung/cal-if/exynos9610/pmucal_local_exynos9610.h
drivers/soc/samsung/cal-if/exynos9610/pmucal_p2vmap_exynos9610.h
drivers/soc/samsung/cal-if/exynos9610/pmucal_system_exynos9610.h

index cd90741b51acb03da939abbb5198e59083d3a7a6..105522183ba09ea51b565e13324ad0e903e810f3 100644 (file)
@@ -193,7 +193,7 @@ struct pmucal_seq vipx2_save[] = {
 };
 
 struct pmucal_seq vipx2_off[] = {
-       PMUCAL_SEQ_DESC(PMUCAL_READ, "VIPX1_STATUS", 0x11860000, 0x40E4, (0xf << 0), (0xF << 0), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_READ, "VIPX1_STATUS", 0x11860000, 0x40E4, (0xf << 0), (0x0 << 0), 0, 0, 0xffffffff, 0),
 };
 
 struct pmucal_seq vipx2_status[] = {
index 1df1c57eb04b43c88fd4e973a4c8d3b523919101..ed583616d3f80abdd46cf5a75b2da5e0ee721dd8 100644 (file)
@@ -20,6 +20,7 @@ struct p2v_map pmucal_p2v_list[] = {
        DEFINE_PHY(0x10C90000),
        DEFINE_PHY(0x10E90000),
        DEFINE_PHY(0x11860000),
+       DEFINE_PHY(0x11870000),
        DEFINE_PHY(0x11810000),
        DEFINE_PHY(0x14510000),
        DEFINE_PHY(0x12010000),
@@ -57,4 +58,4 @@ struct p2v_map pmucal_p2v_list[] = {
        DEFINE_PHY(0x14640000),
        DEFINE_PHY(0x14850000),
 };
-unsigned int pmucal_p2v_list_size = 57;
+unsigned int pmucal_p2v_list_size = 58;
index d0aefd6fa3ff73e23d8ae70d63f3cdeb885f8f1a..c909da16dfa596d94c990784b8bacf50f3ca4b3f 100644 (file)
@@ -124,12 +124,23 @@ struct pmucal_seq pmucal_lpm_init[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "ctrl_ovr", 0x12200000, 0x0000, (0x1 << 3), (0x0 << 3), 0, 0, 0xffffffff, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CG_CONTROL", 0x10440000, 0x001c, (0xffffffff << 0), (0xFFFFFFFF << 0), 0, 0, 0xffffffff, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CG_CONTROL", 0x10540000, 0x001c, (0xffffffff << 0), (0xFFFFFFFF << 0), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_SOC_DOWN_IRQ_OPTION1__DOWN_STATE", 0x11860000, 0x8204, (0x1 << 15), (0x1 << 15), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_SOC_DOWN_IRQ_OPTION0__UP_STATE", 0x11860000, 0x8210, (0x1 << 2), (0x1 << 2), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_DOWN_IRQ_OPTION1__DOWN_STATE", 0x11860000, 0x8224, (0x1 << 15), (0x1 << 15), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_DOWN_IRQ_OPTION0__UP_STATE", 0x11860000, 0x8230, (0x1 << 2), (0x1 << 2), 0, 0, 0xffffffff, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "WDTRESET_LPI", 0x11860000, 0x0418, (0x1 << 0), (0x1 << 0), 0, 0, 0xffffffff, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "DIS_IRQ_AUD_CA7_LOCAL", 0x11860000, 0x10A8, (0x1 << 0), (0x1 << 0), 0, 0, 0xffffffff, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GNSS_CTRL_NS", 0x11860000, 0x0040, (0x1 << 20), (0x0 << 20), 0, 0, 0xffffffff, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "WLBT_CTRL_NS", 0x11860000, 0x0050, (0x1 << 20), (0x0 << 20), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "OSC_CON0_OSC", 0x11860000, 0x0c00, (0x1 << 31), (0x1 << 31), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_RAW_WAIT, "OSC_CON0_OSC", 0x11860000, 0x0c00, (0x1 << 29), (0x1 << 29), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "OSC_CON0_OSC", 0x11860000, 0x0c00, (0x1 << 4), (0x1 << 4), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CTRL_REFCLK_PMU", 0x11860000, 0x0c1c, (0x1 << 4), (0x1 << 4), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CTRL_REFCLK_OSC__MUX_SEL", 0x11860000, 0x0c18, (0x1 << 4), (0x1 << 4), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "PPC_CPUCL0__USE_PPC_BY_SW", 0x11860000, 0x0740, (0x1 << 21), (0x0 << 21), 0, 0, 0xffffffff, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "PPC_CPUCL0__MANUAL_CONTROL_USE_PPC ", 0x11860000, 0x0740, (0x1 << 20), (0x1 << 20), 0, 0, 0xffffffff, 0),
 };
-unsigned int pmucal_lpm_init_size = 128;
+unsigned int pmucal_lpm_init_size = 139;
 /* individual sequence descriptor for each power mode - enter, exit, early_wakeup */
 struct pmucal_seq enter_sicd[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CLUSTER0_CPU0", 0x11860000, 0x1000, (0xf << 0), (0xF << 0), 0, 0, 0, 0),
@@ -286,6 +297,7 @@ struct pmucal_seq enter_sicd[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_SOC_UP_IRQ_OPTION2__UP_STATE ", 0x11860000, 0x8210, (0x1 << 4), (0x0 << 4), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "USB_OPTION", 0x11860000, 0x40C8, (0x1 << 30), (0x0 << 30), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "TOP_BUS_MIF_OPTION", 0x11860000, 0x2C28, (0x1 << 5), (0x0 << 5), 0, 0, 0, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GRP7_INTR_BID_ENABL", 0x11870000, 0x0700, (0x3 << 0), (0x0 << 0), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_CONFIGURATION", 0x11860000, 0x0200, (0x1 << 16), (0x0 << 16), 0, 0, 0xffffffff, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_CONFIGURATION", 0x11860000, 0x0240, (0x1 << 16), (0x0 << 16), 0, 0, 0xffffffff, 0),
 };
@@ -315,6 +327,7 @@ struct pmucal_seq exit_sicd[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "G2D_OPTION[31] (EMULATION)", 0x11860000, 0x40C8, (0x1 << 31), (0x0 << 31), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "VIPX_OPTION[31] (EMULATION)", 0x11860000, 0x40E8, (0x1 << 31), (0x0 << 31), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_OPTION", 0x11860000, 0x0248, (0x1 << 0), (0x0 << 0), 0, 0, 0, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GRP7_INTR_BID_ENABL", 0x11870000, 0x0700, (0x3 << 0), (0x0 << 0), 0, 0, 0, 0),
 };
 
 struct pmucal_seq earlywkup_sicd[] = {
@@ -479,6 +492,7 @@ struct pmucal_seq enter_stop[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_SOC_UP_IRQ_OPTION2__UP_STATE ", 0x11860000, 0x8210, (0x1 << 4), (0x1 << 4), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "USB_OPTION", 0x11860000, 0x40C8, (0x1 << 30), (0x0 << 30), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "TOP_BUS_MIF_OPTION", 0x11860000, 0x2C28, (0x1 << 5), (0x0 << 5), 0, 0, 0, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GRP7_INTR_BID_ENABL", 0x11870000, 0x0700, (0x3 << 0), (0x0 << 0), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_CONFIGURATION", 0x11860000, 0x0200, (0x1 << 16), (0x0 << 16), 0, 0, 0xffffffff, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_CONFIGURATION", 0x11860000, 0x0240, (0x1 << 16), (0x0 << 16), 0, 0, 0xffffffff, 0),
 };
@@ -508,6 +522,7 @@ struct pmucal_seq exit_stop[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "G2D_OPTION[31] (EMULATION)", 0x11860000, 0x40C8, (0x1 << 31), (0x0 << 31), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "VIPX_OPTION[31] (EMULATION)", 0x11860000, 0x40E8, (0x1 << 31), (0x0 << 31), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_OPTION", 0x11860000, 0x0248, (0x1 << 0), (0x0 << 0), 0, 0, 0, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GRP7_INTR_BID_ENABL", 0x11870000, 0x0700, (0x3 << 0), (0x0 << 0), 0, 0, 0, 0),
 };
 
 struct pmucal_seq earlywkup_stop[] = {
@@ -670,6 +685,7 @@ struct pmucal_seq enter_sleep[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_SOC_UP_IRQ_OPTION2__UP_STATE ", 0x11860000, 0x8210, (0x1 << 4), (0x1 << 4), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "USB_OPTION", 0x11860000, 0x40C8, (0x1 << 30), (0x0 << 30), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "TOP_BUS_MIF_OPTION", 0x11860000, 0x2C28, (0x1 << 5), (0x1 << 5), 0, 0, 0, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GRP7_INTR_BID_ENABL", 0x11870000, 0x0700, (0x3 << 0), (0x3 << 0), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_CONFIGURATION", 0x11860000, 0x0200, (0x1 << 16), (0x0 << 16), 0, 0, 0xffffffff, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_CONFIGURATION", 0x11860000, 0x0240, (0x1 << 16), (0x0 << 16), 0, 0, 0xffffffff, 0),
 };
@@ -1060,6 +1076,7 @@ struct pmucal_seq exit_sleep[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "G2D_OPTION[31] (EMULATION)", 0x11860000, 0x40C8, (0x1 << 31), (0x0 << 31), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "VIPX_OPTION[31] (EMULATION)", 0x11860000, 0x40E8, (0x1 << 31), (0x0 << 31), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_OPTION", 0x11860000, 0x0248, (0x1 << 0), (0x0 << 0), 0, 0, 0, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GRP7_INTR_BID_ENABL", 0x11870000, 0x0700, (0x3 << 0), (0x0 << 0), 0, 0, 0, 0),
 };
 
 struct pmucal_seq earlywkup_sleep[] = {
@@ -1222,6 +1239,7 @@ struct pmucal_seq enter_sleep_usb_on[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_SOC_UP_IRQ_OPTION2__UP_STATE ", 0x11860000, 0x8210, (0x1 << 4), (0x1 << 4), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "USB_OPTION", 0x11860000, 0x40C8, (0x1 << 30), (0x1 << 30), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "TOP_BUS_MIF_OPTION", 0x11860000, 0x2C28, (0x1 << 5), (0x1 << 5), 0, 0, 0, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GRP7_INTR_BID_ENABL", 0x11870000, 0x0700, (0x3 << 0), (0x3 << 0), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_CONFIGURATION", 0x11860000, 0x0200, (0x1 << 16), (0x0 << 16), 0, 0, 0xffffffff, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_CONFIGURATION", 0x11860000, 0x0240, (0x1 << 16), (0x0 << 16), 0, 0, 0xffffffff, 0),
 };
@@ -1612,6 +1630,7 @@ struct pmucal_seq exit_sleep_usb_on[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "G2D_OPTION[31] (EMULATION)", 0x11860000, 0x40C8, (0x1 << 31), (0x0 << 31), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "VIPX_OPTION[31] (EMULATION)", 0x11860000, 0x40E8, (0x1 << 31), (0x0 << 31), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_OPTION", 0x11860000, 0x0248, (0x1 << 0), (0x0 << 0), 0, 0, 0, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GRP7_INTR_BID_ENABL", 0x11870000, 0x0700, (0x3 << 0), (0x0 << 0), 0, 0, 0, 0),
 };
 
 struct pmucal_seq earlywkup_sleep_usb_on[] = {
@@ -1774,6 +1793,7 @@ struct pmucal_seq enter_sleep_aud_on[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_SOC_UP_IRQ_OPTION2__UP_STATE ", 0x11860000, 0x8210, (0x1 << 4), (0x1 << 4), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "USB_OPTION", 0x11860000, 0x40C8, (0x1 << 30), (0x0 << 30), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "TOP_BUS_MIF_OPTION", 0x11860000, 0x2C28, (0x1 << 5), (0x1 << 5), 0, 0, 0, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GRP7_INTR_BID_ENABL", 0x11870000, 0x0700, (0x3 << 0), (0x3 << 0), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_CONFIGURATION", 0x11860000, 0x0200, (0x1 << 16), (0x0 << 16), 0, 0, 0xffffffff, 0),
 };
 
@@ -2162,6 +2182,7 @@ struct pmucal_seq exit_sleep_aud_on[] = {
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "G2D_OPTION[31] (EMULATION)", 0x11860000, 0x40C8, (0x1 << 31), (0x0 << 31), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "VIPX_OPTION[31] (EMULATION)", 0x11860000, 0x40E8, (0x1 << 31), (0x0 << 31), 0, 0, 0, 0),
        PMUCAL_SEQ_DESC(PMUCAL_WRITE, "CENTRAL_SEQ_MIF_OPTION", 0x11860000, 0x0248, (0x1 << 0), (0x0 << 0), 0, 0, 0, 0),
+       PMUCAL_SEQ_DESC(PMUCAL_WRITE, "GRP7_INTR_BID_ENABL", 0x11870000, 0x0700, (0x3 << 0), (0x0 << 0), 0, 0, 0, 0),
 };
 
 struct pmucal_seq earlywkup_sleep_aud_on[] = {