struct vb2_v4l2_buffer *vb2buf_img, *vb2buf_jpg;
u32 stream_address;
u32 format = ctx->img_fmt->regcfg;
+ u32 maxstreamsize;
__raw_writel(ctx->width | (ctx->height << 16),
ctx->smfc->reg + REG_MAIN_IMAGE_SIZE);
}
smfc_hwconfigure_image_base(ctx, &vb2buf_img->vb2_buf, false);
- stream_address = smfc_hwconfigure_jpeg_base(ctx, &vb2buf_jpg->vb2_buf,
- false);
-
__raw_writel(format, ctx->smfc->reg + REG_MAIN_IMAGE_FORMAT);
- __raw_writel(vb2_plane_size(&vb2buf_jpg->vb2_buf, 0) -
- (stream_address & SMFC_ADDR_ALIGN_MASK),
- ctx->smfc->reg + REG_MAIN_MAX_STREAM_SIZE);
+ stream_address = smfc_hwconfigure_jpeg_base(
+ ctx, &vb2buf_jpg->vb2_buf, false);
+ maxstreamsize = round_down(vb2_plane_size(&vb2buf_jpg->vb2_buf, 0),
+ SMFC_STREAMSIZE_ALIGN);
+ if (!IS_ALIGNED(stream_address, 16))
+ maxstreamsize += SMFC_EXTRA_STREAMSIZE(stream_address);
+
+ __raw_writel(maxstreamsize, ctx->smfc->reg + REG_MAIN_MAX_STREAM_SIZE);
}
void smfc_hwconfigure_start(struct smfc_ctx *ctx,
#define SMFC_MAX_HEIGHT 16368U
#define SMFC_MIN_WIDTH 8U
#define SMFC_MIN_HEIGHT 8U
-#define SMFC_ADDR_ALIGN_MASK (16 - 1) /* 128-bit align */
+#define SMFC_ADDR_ALIGN 16 /* 128-bit align */
+#define SMFC_ADDR_ALIGN_MASK (SMFC_ADDR_ALIGN - 1)
+#define SMFC_STREAMSIZE_ALIGN 64
+#define SMFC_STREAMSIZE_ALIGN_MASK (64 - 1)
+#define SMFC_EXTRA_STREAMSIZE(base) \
+ (SMFC_STREAMSIZE_ALIGN - ((base) & SMFC_ADDR_ALIGN_MASK))
/********** H/W REGISTERS and DEFAULT VALUES **********************************/
#define REG_MAIN_JPEG_CNTL 0x000