arm64: dts: marvell: Add Aardvark PCIe support for Armada 3700

Add the SoC-level description of the PCIe controller found on the Marvell
Armada 3700 and enable this PCIe controller on the development board for
this SoC.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 86110a6ae33095ac5af652a80052ac566b5f9c7b..1372e9a6aaa457d4c687fcfbd9e05c17adcc9c1f 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -76,3 +76,8 @@
 &usb3 {
        status = "okay";
 };
+
+/* CON17 (PCIe) / CON12 (mini-PCIe) */
+&pcie0 {
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 9e2efb882983558e1cc34fa9bdd2f135b64f60b8..8a9cae9677bf57c4407d2fb0cd4342356da3289f 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -141,5 +141,30 @@
                                      <0x1d40000 0x40000>; /* GICR */
                        };
                };
+
+               pcie0: pcie@d0070000 {
+                       compatible = "marvell,armada-3700-pcie";
+                       device_type = "pci";
+                       status = "disabled";
+                       reg = <0 0xd0070000 0 0x20000>;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       bus-range = <0x00 0xff>;
+                       interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                       #interrupt-cells = <1>;
+                       msi-parent = <&pcie0>;
+                       msi-controller;
+                       ranges = <0x82000000 0 0xe8000000   0 0xe8000000 0 0x1000000 /* Port 0 MEM */
+                                 0x81000000 0 0xe9000000   0 0xe9000000 0 0x10000>; /* Port 0 IO*/
+                       interrupt-map-mask = <0 0 0 7>;
+                       interrupt-map = <0 0 0 1 &pcie_intc 0>,
+                                       <0 0 0 2 &pcie_intc 1>,
+                                       <0 0 0 3 &pcie_intc 2>,
+                                       <0 0 0 4 &pcie_intc 3>;
+                       pcie_intc: interrupt-controller {
+                               interrupt-controller;
+                               #interrupt-cells = <1>;
+                       };
+               };
        };
 };