#define PL330_DBGMC_START(addr) do {} while (0)
#endif
+#ifdef CONFIG_DMADEVICES_DEBUG
+#define DBG_PRINT(x...) exynos_ss_printk(x);
+#else
+#define DBG_PRINT(x...) do {} while (0)
+#endif
+
/* The number of default descriptors */
#define NR_DEFAULT_DESC 16
dma_descriptor_unmap(&desc->txd);
+ DBG_PRINT("[%s] before callback\n", __func__);
if (dmaengine_desc_callback_valid(&cb)) {
spin_unlock_irqrestore(&pch->lock, flags);
dmaengine_desc_callback_invoke(&cb, NULL);
spin_lock_irqsave(&pch->lock, flags);
}
+ DBG_PRINT("[%s] after callback\n", __func__);
}
spin_unlock_irqrestore(&pch->lock, flags);
return IRQ_NONE;
}
+int pl330_dma_debug(struct dma_chan *chan)
+{
+ struct dma_pl330_chan *pch = to_pchan(chan);
+ void __iomem *regs;
+ struct pl330_thread *thrd;
+
+ if (unlikely(!pch))
+ return -EINVAL;
+
+ thrd = pch->thread;
+ regs = &pch->dmac->base;
+
+ dev_info(pch->dmac->ddma.dev,"[ DMA Register Dump(id: %d) ]\n", thrd->id);
+ dev_info(pch->dmac->ddma.dev,"DAR:0x%x\n", readl(regs + DA(thrd->id)));
+ dev_info(pch->dmac->ddma.dev,"SAR:0x%x\n", readl(regs + SA(thrd->id)));
+ dev_info(pch->dmac->ddma.dev,"DBGSTATUS:0x%x\n", readl(regs + DBGSTATUS));
+ dev_info(pch->dmac->ddma.dev,"INTMIS:0x%x\n", readl(regs + INTSTATUS));
+ dev_info(pch->dmac->ddma.dev,"DSR:0x%x\n", readl(regs + DS));
+ dev_info(pch->dmac->ddma.dev,"CCR:0x%x\n", readl(regs + CC(thrd->id)));
+ dev_info(pch->dmac->ddma.dev,"CSR:0x%x\n", readl(regs + CS(thrd->id)));
+ dev_info(pch->dmac->ddma.dev,"CRD:0x%x\n", readl(regs + CRD));
+ dev_info(pch->dmac->ddma.dev,"LC0:0x%x\n", readl(regs + LC0(thrd->id)));
+ dev_info(pch->dmac->ddma.dev,"LC1:0x%x\n", readl(regs + LC1(thrd->id)));
+ dev_info(pch->dmac->ddma.dev,"FTR:0x%x\n", readl(regs + FTC(thrd->id)));
+ dev_info(pch->dmac->ddma.dev,"FTRD:0x%x\n", readl(regs + FTM));
+ dev_info(pch->dmac->ddma.dev,"FSRC:0x%x\n", readl(regs + FSC));
+ dev_info(pch->dmac->ddma.dev,"FSRD:0x%x\n", readl(regs + FSM));
+
+ return 0;
+}
+EXPORT_SYMBOL(pl330_dma_debug);
+
int pl330_dma_getposition(struct dma_chan *chan,
dma_addr_t *src, dma_addr_t *dst)
{
#ifndef __DMA_PL330_H_
#define __DMA_PL330_H_ __FILE__
-#include <linux/dmaengine.h>
-
/*
* PL330 can assign any channel to communicate with
* any of the peripherals attched to the DMAC.
* use these just as IDs.
*/
enum dma_ch {
- DMACH_MAX = 0,
+ DMACH_UART0_RX = 0,
+ DMACH_UART0_TX,
+ DMACH_UART1_RX,
+ DMACH_UART1_TX,
+ DMACH_UART2_RX,
+ DMACH_UART2_TX,
+ DMACH_UART3_RX,
+ DMACH_UART3_TX,
+ DMACH_UART4_RX,
+ DMACH_UART4_TX,
+ DMACH_UART5_RX,
+ DMACH_UART5_TX,
+ DMACH_USI_RX,
+ DMACH_USI_TX,
+ DMACH_IRDA,
+ DMACH_I2S0_RX,
+ DMACH_I2S0_TX,
+ DMACH_I2S0S_TX,
+ DMACH_I2S1_RX,
+ DMACH_I2S1_TX,
+ DMACH_I2S2_RX,
+ DMACH_I2S2_TX,
+ DMACH_SPI0_RX,
+ DMACH_SPI0_TX,
+ DMACH_SPI1_RX,
+ DMACH_SPI1_TX,
+ DMACH_SPI2_RX,
+ DMACH_SPI2_TX,
+ DMACH_AC97_MICIN,
+ DMACH_AC97_PCMIN,
+ DMACH_AC97_PCMOUT,
+ DMACH_EXTERNAL,
+ DMACH_PWM,
+ DMACH_SPDIF,
+ DMACH_HSI_RX,
+ DMACH_HSI_TX,
+ DMACH_PCM0_TX,
+ DMACH_PCM0_RX,
+ DMACH_PCM1_TX,
+ DMACH_PCM1_RX,
+ DMACH_PCM2_TX,
+ DMACH_PCM2_RX,
+ DMACH_MSM_REQ3,
+ DMACH_MSM_REQ2,
+ DMACH_MSM_REQ1,
+ DMACH_MSM_REQ0,
+ DMACH_SLIMBUS0_RX,
+ DMACH_SLIMBUS0_TX,
+ DMACH_SLIMBUS0AUX_RX,
+ DMACH_SLIMBUS0AUX_TX,
+ DMACH_SLIMBUS1_RX,
+ DMACH_SLIMBUS1_TX,
+ DMACH_SLIMBUS2_RX,
+ DMACH_SLIMBUS2_TX,
+ DMACH_SLIMBUS3_RX,
+ DMACH_SLIMBUS3_TX,
+ DMACH_SLIMBUS4_RX,
+ DMACH_SLIMBUS4_TX,
+ DMACH_SLIMBUS5_RX,
+ DMACH_SLIMBUS5_TX,
+ DMACH_MIPI_HSI0,
+ DMACH_MIPI_HSI1,
+ DMACH_MIPI_HSI2,
+ DMACH_MIPI_HSI3,
+ DMACH_MIPI_HSI4,
+ DMACH_MIPI_HSI5,
+ DMACH_MIPI_HSI6,
+ DMACH_MIPI_HSI7,
+ DMACH_DISP1,
+ DMACH_MTOM_0,
+ DMACH_MTOM_1,
+ DMACH_MTOM_2,
+ DMACH_MTOM_3,
+ DMACH_MTOM_4,
+ DMACH_MTOM_5,
+ DMACH_MTOM_6,
+ DMACH_MTOM_7,
+ /* END Marker, also used to denote a reserved channel */
+ DMACH_MAX,
};
struct s3c2410_dma_client {
return true;
}
+#include <linux/dmaengine.h>
+
struct samsung_dma_req {
enum dma_transaction_type cap;
struct s3c2410_dma_client *client;
int (*debug)(unsigned long ch);
};
-/*
- * samsung_dma_get_ops
- * get the set of samsung dma operations
- */
-#ifdef CONFIG_SAMSUNG_DMADEV
extern void *samsung_dmadev_get_ops(void);
extern void *s3c_dma_get_ops(void);
-static inline void *samsung_dma_get_ops(void)
+static inline void *__samsung_dma_get_ops(void)
{
if (samsung_dma_is_dmadev())
return samsung_dmadev_get_ops();
else
return s3c_dma_get_ops();
}
+
+/*
+ * samsung_dma_get_ops
+ * get the set of samsung dma operations
+ */
+#ifdef CONFIG_SAMSUNG_DMADEV
+#define samsung_dma_get_ops() __samsung_dma_get_ops()
#else
#define samsung_dma_get_ops() NULL
#endif
#endif /* __DMA_PL330_H_ */
-