select IOMMU_API
config OMAP_IOMMU_DEBUG
------- tristate "Export OMAP IOMMU internals in DebugFS"
------- depends on OMAP_IOMMU && DEBUG_FS
------- help
------- Select this to see extensive information about
------- the internal state of OMAP IOMMU in debugfs.
+++++++ bool "Export OMAP IOMMU internals in DebugFS"
+++++++ depends on OMAP_IOMMU && DEBUG_FS
+++++++ ---help---
+++++++ Select this to see extensive information about
+++++++ the internal state of OMAP IOMMU in debugfs.
+ +++++
- Say N unless you know you need this.
+++++++ Say N unless you know you need this.
- ----- Say N unless you know you need this.
++ +++++config ROCKCHIP_IOMMU
++ +++++ bool "Rockchip IOMMU Support"
++ +++++ depends on ARM
++ +++++ depends on ARCH_ROCKCHIP || COMPILE_TEST
++ +++++ select IOMMU_API
++ +++++ select ARM_DMA_USE_IOMMU
++ +++++ help
++ +++++ Support for IOMMUs found on Rockchip rk32xx SOCs.
++ +++++ These IOMMUs allow virtualization of the address space used by most
++ +++++ cores within the multimedia subsystem.
++ +++++ Say Y here if you are using a Rockchip SoC that includes an IOMMU
++ +++++ device.
+
config TEGRA_IOMMU_GART
bool "Tegra GART IOMMU Support"
depends on ARCH_TEGRA_2x_SOC
iommu_group_remove_device(dev);
}
++++ +++static int arm_smmu_domain_get_attr(struct iommu_domain *domain,
++++ +++ enum iommu_attr attr, void *data)
++++ +++{
++++ +++ struct arm_smmu_domain *smmu_domain = domain->priv;
++++ +++
++++ +++ switch (attr) {
++++ +++ case DOMAIN_ATTR_NESTING:
++++ +++ *(int *)data = (smmu_domain->stage == ARM_SMMU_DOMAIN_NESTED);
++++ +++ return 0;
++++ +++ default:
++++ +++ return -ENODEV;
++++ +++ }
++++ +++}
++++ +++
++++ +++static int arm_smmu_domain_set_attr(struct iommu_domain *domain,
++++ +++ enum iommu_attr attr, void *data)
++++ +++{
++++ +++ struct arm_smmu_domain *smmu_domain = domain->priv;
++++ +++
++++ +++ switch (attr) {
++++ +++ case DOMAIN_ATTR_NESTING:
++++ +++ if (smmu_domain->smmu)
++++ +++ return -EPERM;
++++ +++ if (*(int *)data)
++++ +++ smmu_domain->stage = ARM_SMMU_DOMAIN_NESTED;
++++ +++ else
++++ +++ smmu_domain->stage = ARM_SMMU_DOMAIN_S1;
++++ +++
++++ +++ return 0;
++++ +++ default:
++++ +++ return -ENODEV;
++++ +++ }
++++ +++}
++++ +++
static const struct iommu_ops arm_smmu_ops = {
---- --- .capable = arm_smmu_capable,
---- --- .domain_init = arm_smmu_domain_init,
---- --- .domain_destroy = arm_smmu_domain_destroy,
---- --- .attach_dev = arm_smmu_attach_dev,
---- --- .detach_dev = arm_smmu_detach_dev,
---- --- .map = arm_smmu_map,
---- --- .unmap = arm_smmu_unmap,
- .map_sg = default_iommu_map_sg,
---- --- .iova_to_phys = arm_smmu_iova_to_phys,
---- --- .add_device = arm_smmu_add_device,
---- --- .remove_device = arm_smmu_remove_device,
---- --- .pgsize_bitmap = (SECTION_SIZE |
---- --- ARM_SMMU_PTE_CONT_SIZE |
---- --- PAGE_SIZE),
++++ +++ .capable = arm_smmu_capable,
++++ +++ .domain_init = arm_smmu_domain_init,
++++ +++ .domain_destroy = arm_smmu_domain_destroy,
++++ +++ .attach_dev = arm_smmu_attach_dev,
++++ +++ .detach_dev = arm_smmu_detach_dev,
++++ +++ .map = arm_smmu_map,
++++ +++ .unmap = arm_smmu_unmap,
++++++++ .map_sg = default_iommu_map_sg,
++++ +++ .iova_to_phys = arm_smmu_iova_to_phys,
++++ +++ .add_device = arm_smmu_add_device,
++++ +++ .remove_device = arm_smmu_remove_device,
++++ +++ .domain_get_attr = arm_smmu_domain_get_attr,
++++ +++ .domain_set_attr = arm_smmu_domain_set_attr,
++++ +++ .pgsize_bitmap = (SECTION_SIZE |
++++ +++ ARM_SMMU_PTE_CONT_SIZE |
++++ +++ PAGE_SIZE),
};
static void arm_smmu_device_reset(struct arm_smmu_device *smmu)