drm/i915: Introduce i915_vgacntrl_reg()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 25 Jan 2013 19:44:46 +0000 (21:44 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 31 Jan 2013 10:50:12 +0000 (11:50 +0100)
The VGACNTRL register has moved around between different platforms.
To handle the differences add i915_vgacntrl_reg() which returns the
correct offset for the VGACNTRL register.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/i915_suspend.c
drivers/gpu/drm/i915/intel_display.c

index d3274164143d7e110b19ebf3466719239ec7e600..984523d809a86d03a2455e28bf5cd852a2e70934 100644 (file)
@@ -1887,4 +1887,14 @@ __i915_write(64, q)
 #define INTEL_BROADCAST_RGB_FULL 1
 #define INTEL_BROADCAST_RGB_LIMITED 2
 
+static inline uint32_t i915_vgacntrl_reg(struct drm_device *dev)
+{
+       if (HAS_PCH_SPLIT(dev))
+               return CPU_VGACNTRL;
+       else if (IS_VALLEYVIEW(dev))
+               return VLV_VGACNTRL;
+       else
+               return VGACNTRL;
+}
+
 #endif
index 9a3cd047ad9bf28c74dc879750d4d7dd52ec8304..e2b592a68f5826463877f42efc54375baed947f9 100644 (file)
 # define VGA_2X_MODE                           (1 << 30)
 # define VGA_PIPE_B_SELECT                     (1 << 29)
 
+#define VLV_VGACNTRL           (VLV_DISPLAY_BASE + 0x71400)
+
 /* Ironlake */
 
 #define CPU_VGACNTRL   0x41000
index 3911e0450bbe18385125d2256253cf4f489d6005..2135f21ea45870aa3475f55bde828b61a5954a20 100644 (file)
@@ -73,10 +73,7 @@ static void i915_save_vga(struct drm_device *dev)
        dev_priv->regfile.saveVGA0 = I915_READ(VGA0);
        dev_priv->regfile.saveVGA1 = I915_READ(VGA1);
        dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD);
-       if (HAS_PCH_SPLIT(dev))
-               dev_priv->regfile.saveVGACNTRL = I915_READ(CPU_VGACNTRL);
-       else
-               dev_priv->regfile.saveVGACNTRL = I915_READ(VGACNTRL);
+       dev_priv->regfile.saveVGACNTRL = I915_READ(i915_vgacntrl_reg(dev));
 
        /* VGA color palette registers */
        dev_priv->regfile.saveDACMASK = I915_READ8(VGA_DACMASK);
@@ -137,10 +134,7 @@ static void i915_restore_vga(struct drm_device *dev)
        u16 cr_index, cr_data, st01;
 
        /* VGA state */
-       if (HAS_PCH_SPLIT(dev))
-               I915_WRITE(CPU_VGACNTRL, dev_priv->regfile.saveVGACNTRL);
-       else
-               I915_WRITE(VGACNTRL, dev_priv->regfile.saveVGACNTRL);
+       I915_WRITE(i915_vgacntrl_reg(dev), dev_priv->regfile.saveVGACNTRL);
 
        I915_WRITE(VGA0, dev_priv->regfile.saveVGA0);
        I915_WRITE(VGA1, dev_priv->regfile.saveVGA1);
index 1f1d045912fb086392d52c9c9a4a17370a8ffed7..62f45907e4df358710e7dbbdf1f34f94227f036a 100644 (file)
@@ -8670,12 +8670,7 @@ static void i915_disable_vga(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
        u8 sr1;
-       u32 vga_reg;
-
-       if (HAS_PCH_SPLIT(dev))
-               vga_reg = CPU_VGACNTRL;
-       else
-               vga_reg = VGACNTRL;
+       u32 vga_reg = i915_vgacntrl_reg(dev);
 
        vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
        outb(SR01, VGA_SR_INDEX);
@@ -8937,12 +8932,7 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
 void i915_redisable_vga(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
-       u32 vga_reg;
-
-       if (HAS_PCH_SPLIT(dev))
-               vga_reg = CPU_VGACNTRL;
-       else
-               vga_reg = VGACNTRL;
+       u32 vga_reg = i915_vgacntrl_reg(dev);
 
        if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
                DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");