drm/i915: Rename to GEN8_LEGACY_PDPES
authorBen Widawsky <benjamin.widawsky@intel.com>
Thu, 22 Jan 2015 17:01:24 +0000 (17:01 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 13 Feb 2015 22:28:11 +0000 (23:28 +0100)
In gen8, 32b PPGTT has always had one "pdp" (it doesn't actually have
one, but it resembles having one). The #define was confusing as is, and
using "PDPE" is a much better description.

sed -i 's/GEN8_LEGACY_PDPS/GEN8_LEGACY_PDPES/' drivers/gpu/drm/i915/*.[ch]

It also matches the x86 pagetable terminology:
PTE  = Page Table Entry - pagetable level 1 page
PDE  = Page Directory Entry - pagetable level 2 page
PDPE = Page Directory Pointer Entry - pagetable level 3 page

And in the near future (for 48b addressing):
PML4E = Page Map Level 4 Entry

v2: Expanded information about Page Directory/Table nomenclature.

Cc: Daniel Vetter <daniel@ffwll.ch>
CC: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2)
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/i915_gem_gtt.h

index 746f77fb57a314d5b94542b12b67b7a16bfb50eb..58d54bddfb986b12999a9b295bd431130260a235 100644 (file)
@@ -375,7 +375,7 @@ static void gen8_ppgtt_insert_entries(struct i915_address_space *vm,
        pt_vaddr = NULL;
 
        for_each_sg_page(pages->sgl, &sg_iter, pages->nents, 0) {
-               if (WARN_ON(pdpe >= GEN8_LEGACY_PDPS))
+               if (WARN_ON(pdpe >= GEN8_LEGACY_PDPES))
                        break;
 
                if (pt_vaddr == NULL)
@@ -486,7 +486,7 @@ bail:
 static int gen8_ppgtt_allocate_page_tables(struct i915_hw_ppgtt *ppgtt,
                                           const int max_pdp)
 {
-       struct page **pt_pages[GEN8_LEGACY_PDPS];
+       struct page **pt_pages[GEN8_LEGACY_PDPES];
        int i, ret;
 
        for (i = 0; i < max_pdp; i++) {
@@ -537,7 +537,7 @@ static int gen8_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt,
                return -ENOMEM;
 
        ppgtt->num_pd_pages = 1 << get_order(max_pdp << PAGE_SHIFT);
-       BUG_ON(ppgtt->num_pd_pages > GEN8_LEGACY_PDPS);
+       BUG_ON(ppgtt->num_pd_pages > GEN8_LEGACY_PDPES);
 
        return 0;
 }
index e377c7d27bd42272d9ecf662c4e6e9b80159a6ea..9d998ecc5943c853aaf40b5582c0c82cced51ba6 100644 (file)
@@ -88,7 +88,7 @@ typedef gen8_gtt_pte_t gen8_ppgtt_pde_t;
 #define GEN8_PDE_MASK                  0x1ff
 #define GEN8_PTE_SHIFT                 12
 #define GEN8_PTE_MASK                  0x1ff
-#define GEN8_LEGACY_PDP              4
+#define GEN8_LEGACY_PDPES              4
 #define GEN8_PTES_PER_PAGE             (PAGE_SIZE / sizeof(gen8_gtt_pte_t))
 #define GEN8_PDES_PER_PAGE             (PAGE_SIZE / sizeof(gen8_ppgtt_pde_t))
 
@@ -273,12 +273,12 @@ struct i915_hw_ppgtt {
        unsigned num_pd_pages; /* gen8+ */
        union {
                struct page **pt_pages;
-               struct page **gen8_pt_pages[GEN8_LEGACY_PDPS];
+               struct page **gen8_pt_pages[GEN8_LEGACY_PDPES];
        };
        struct page *pd_pages;
        union {
                uint32_t pd_offset;
-               dma_addr_t pd_dma_addr[GEN8_LEGACY_PDPS];
+               dma_addr_t pd_dma_addr[GEN8_LEGACY_PDPES];
        };
        union {
                dma_addr_t *pt_dma_addr;