#include "arm_core_scaling.h"
#include "mali_executor.h"
#include "platform_pmm.h"
-
+#include "mach/mt_reg_base.h"
static int mali_core_scaling_enable = 0;
extern unsigned int current_sample_utilization;
#endif
};
-
#ifndef CONFIG_MALI_DT
+static struct resource mali_gpu_resources[] =
+{
+ MALI_GPU_RESOURCES_MALI450_MP4(
+ IO_VIRT_TO_PHYS(MALI_BASE),
+ MT_MFG_IRQ0_ID,
+ MT_MFG_IRQ1_ID,
+ MT_MFG_IRQ2_ID,
+ MT_MFG_IRQ3_ID,
+ MT_MFG_IRQ4_ID,
+ MT_MFG_IRQ5_ID,
+ MT_MFG_IRQ6_ID,
+ MT_MFG_IRQ7_ID,
+ MT_MFG_IRQ8_ID,
+ MT_MFG_IRQ9_ID,
+ MT_MFG_IRQ10_ID
+ )
+};
+
+static struct resource mali_gpu_resources_MP3[] =
+{
+ MALI_GPU_RESOURCES_MALI450_MP3(
+ IO_VIRT_TO_PHYS(MALI_BASE),
+ MT_MFG_IRQ0_ID,
+ MT_MFG_IRQ1_ID,
+ MT_MFG_IRQ2_ID,
+ MT_MFG_IRQ3_ID,
+ MT_MFG_IRQ4_ID,
+ MT_MFG_IRQ5_ID,
+ MT_MFG_IRQ6_ID,
+ MT_MFG_IRQ7_ID,
+ MT_MFG_IRQ10_ID
+ )
+};
+
+static struct resource mali_gpu_resources_MP2[] =
+{
+ MALI_GPU_RESOURCES_MALI450_MP2(
+ IO_VIRT_TO_PHYS(MALI_BASE),
+ MT_MFG_IRQ0_ID,
+ MT_MFG_IRQ1_ID,
+ MT_MFG_IRQ2_ID,
+ MT_MFG_IRQ3_ID,
+ MT_MFG_IRQ4_ID,
+ MT_MFG_IRQ5_ID,
+ MT_MFG_IRQ10_ID
+ )
+};
+
static struct platform_device mali_gpu_device = {
.name = MALI_GPU_NAME_UTGARD,
.id = 0,
+ .num_resources = ARRAY_SIZE(mali_gpu_resources),
+ .resource = (struct resource *)&mali_gpu_resources,
+ .dev.platform_data = &mali_gpu_data,
.dev.release = mali_platform_device_release,
- .dev.dma_mask = &mali_gpu_device.dev.coherent_dma_mask,
.dev.coherent_dma_mask = DMA_BIT_MASK(32),
+ .dev.dma_mask = &mali_gpu_device.dev.coherent_dma_mask,
- .dev.platform_data = &mali_gpu_data,
#if defined(CONFIG_ARM64)
.dev.archdata.dma_ops = &noncoherent_swiotlb_dma_ops,
#endif
};
-int mali_platform_device_register(void)
-{
- int err = -1;
- int num_pp_cores = 0;
-#if defined(CONFIG_ARCH_REALVIEW)
- u32 m400_gp_version;
-#endif
-
- MALI_DEBUG_PRINT(4, ("mali_platform_device_register() called\n"));
-
- /* Detect present Mali GPU and connect the correct resources to the device */
-#if defined(CONFIG_ARCH_VEXPRESS)
+static u32 get_devinfo() {
+ /*TODO: replace this with get_devinfo_with_index*/
+ return *(volatile u32 *)0xf0206174;
+}
+static u32 get_gpuinfo() {
+ /*TODO: replace this with get_devinfo_with_index*/
+ return *(volatile u32 *)0xf0206040;
+}
-#if defined(CONFIG_ARM64)
- if (mali_read_phys(0x6F000000) == 0x40601450) {
- MALI_DEBUG_PRINT(4, ("Registering Mali-450 MP6 device\n"));
- num_pp_cores = 6;
- mali_gpu_device.num_resources = ARRAY_SIZE(mali_gpu_resources_m450_mp6);
- mali_gpu_device.resource = mali_gpu_resources_m450_mp6;
- }
+#define MALI_REASSIGN_RESOURCE(device, X) \
+do {\
+ device->resource = (struct resource *)&(X);\
+ device->num_resources = ARRAY_SIZE((X));\
+}while(0)
+
+static void update_dev_info(struct platform_device * device ) {
+ u32 info = get_devinfo();
+ MALI_DEBUG_PRINT(1, ("devinfo %#x\n", info));
+
+ /*if(0x0 == (info & (0x1 << 31))) { t or b*/
+ /*T*/
+ u32 gpuinfo = get_gpuinfo();
+ MALI_DEBUG_PRINT(1, ("gpuinfo %#x\n", gpuinfo));
+ u32 pp = (gpuinfo & 0x60000) >> 17;
+ if(pp == 0x1) {
+ MALI_DEBUG_PRINT(1, ("Found devinfo of MP3 %s\n", __FUNCTION__));
+ MALI_REASSIGN_RESOURCE(device, mali_gpu_resources_MP3);
+ } else if(pp == 0x2 || pp == 0x3) {
+ MALI_DEBUG_PRINT(1, ("Found devinfo of MP2 %s, %d\n", __FUNCTION__, pp));
+ MALI_REASSIGN_RESOURCE(device, mali_gpu_resources_MP2);
+ } else {
+#ifdef MTK_NR_MALI_PP
+#if (MTK_NR_MALI_PP == 3)
+ MALI_DEBUG_PRINT(1, ("Mali MP3 %s (MTK_NR_MALI_PP)\n", __FUNCTION__));
+ MALI_REASSIGN_RESOURCE(device, mali_gpu_resources_MP3);
+#elif (MTK_NR_MALI_PP == 2)
+ MALI_DEBUG_PRINT(1, ("Mali MP2 %s (MTK_NR_MALI_PP)\n", __FUNCTION__));
+ MALI_REASSIGN_RESOURCE(device, mali_gpu_resources_MP2);
#else
- if (mali_read_phys(0xFC000000) == 0x00000450) {
- MALI_DEBUG_PRINT(4, ("Registering Mali-450 MP8 device\n"));
- num_pp_cores = 8;
- mali_gpu_device.num_resources = ARRAY_SIZE(mali_gpu_resources_m450_mp8);
- mali_gpu_device.resource = mali_gpu_resources_m450_mp8;
- } else if (mali_read_phys(0xFC000000) == 0x40600450) {
- MALI_DEBUG_PRINT(4, ("Registering Mali-450 MP6 device\n"));
- num_pp_cores = 6;
- mali_gpu_device.num_resources = ARRAY_SIZE(mali_gpu_resources_m450_mp6);
- mali_gpu_device.resource = mali_gpu_resources_m450_mp6;
- } else if (mali_read_phys(0xFC000000) == 0x40400450) {
- MALI_DEBUG_PRINT(4, ("Registering Mali-450 MP4 device\n"));
- num_pp_cores = 4;
- mali_gpu_device.num_resources = ARRAY_SIZE(mali_gpu_resources_m450_mp4);
- mali_gpu_device.resource = mali_gpu_resources_m450_mp4;
+ MALI_DEBUG_PRINT(1, ("Default MP4 %s, ignore cfg: %d\n", __FUNCTION__, MTK_NR_MALI_PP));
+#endif
+#else
+ MALI_DEBUG_PRINT(1, ("Default MP4 %s\n", __FUNCTION__));
+#endif
}
-#endif /* CONFIG_ARM64 */
+}
-#elif defined(CONFIG_ARCH_REALVIEW)
+extern unsigned int get_max_DRAM_size (void);
+int mali_platform_device_register(void)
+{
+ int num_pp_cores = 4; //TODO: Need specify if we are using diff config
+ int err = -1;
+ MALI_DEBUG_PRINT(1, ("%s\n", __FUNCTION__));
+ mali_gpu_data.shared_mem_size = get_max_DRAM_size();
- m400_gp_version = mali_read_phys(0xC000006C);
- if ((m400_gp_version & 0xFFFF0000) == 0x0C070000) {
- MALI_DEBUG_PRINT(4, ("Registering Mali-300 device\n"));
- num_pp_cores = 1;
- mali_gpu_device.num_resources = ARRAY_SIZE(mali_gpu_resources_m300);
- mali_gpu_device.resource = mali_gpu_resources_m300;
- mali_write_phys(0xC0010020, 0xA); /* Enable direct memory mapping for FPGA */
- } else if ((m400_gp_version & 0xFFFF0000) == 0x0B070000) {
- u32 fpga_fw_version = mali_read_phys(0xC0010000);
- if (fpga_fw_version == 0x130C008F || fpga_fw_version == 0x110C008F) {
- /* Mali-400 MP1 r1p0 or r1p1 */
- MALI_DEBUG_PRINT(4, ("Registering Mali-400 MP1 device\n"));
- num_pp_cores = 1;
- mali_gpu_device.num_resources = ARRAY_SIZE(mali_gpu_resources_m400_mp1);
- mali_gpu_device.resource = mali_gpu_resources_m400_mp1;
- mali_write_phys(0xC0010020, 0xA); /* Enable direct memory mapping for FPGA */
- } else if (fpga_fw_version == 0x130C000F) {
- /* Mali-400 MP2 r1p1 */
- MALI_DEBUG_PRINT(4, ("Registering Mali-400 MP2 device\n"));
- num_pp_cores = 2;
- mali_gpu_device.num_resources = ARRAY_SIZE(mali_gpu_resources_m400_mp2);
- mali_gpu_device.resource = mali_gpu_resources_m400_mp2;
- mali_write_phys(0xC0010020, 0xA); /* Enable direct memory mapping for FPGA */
- }
- }
+ update_dev_info(&mali_gpu_device);
+
+ err = platform_device_register(&mali_gpu_device);
+
+ if (0 == err)
+ {
+ mali_pmm_init(&mali_gpu_device);
+ mali_core_scaling_init(num_pp_cores);
-#endif
+ return 0;
+ }
- /* Register the platform device */
- err = platform_device_register(&mali_gpu_device);
- if (0 == err) {
-#ifdef CONFIG_PM_RUNTIME
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
- pm_runtime_set_autosuspend_delay(&(mali_gpu_device.dev), 1000);
- pm_runtime_use_autosuspend(&(mali_gpu_device.dev));
-#endif
- pm_runtime_enable(&(mali_gpu_device.dev));
-#endif
- MALI_DEBUG_ASSERT(0 < num_pp_cores);
- mali_core_scaling_init(num_pp_cores);
+ MALI_DEBUG_PRINT(1, ("%s err=%d\n",__FUNCTION__, err));
- return 0;
- }
+ platform_device_unregister(&mali_gpu_device);
- return err;
+ return err;
}
void mali_platform_device_unregister(void)
#include <linux/proc_fs.h>
#else
#include "mach/mt_gpufreq.h"
+#include "mach/mt_clkmgr.h"
#endif
-/*
+
extern unsigned long (*mtk_thermal_get_gpu_loading_fp) (void);
extern unsigned long (*mtk_get_gpu_loading_fp) (void);
-*/
+
static int bPoweroff;
unsigned int current_sample_utilization;
extern u32 get_devinfo_with_index(u32 index);
static int _need_univpll;
+#define MFG_SPD_MASK 0x80000
+
+#define mfg_pwr_unlock(flags) \
+do { \
+ spin_unlock_irqrestore(&mali_pwr_lock, flags); \
+} while(0)
+
#ifdef CONFIG_MALI_DT
/* MFG begin
#define MFG_CG_CLR 0x8
#define MFG_DEBUG_SEL 0x180
#define MFG_DEBUG_STAT 0x184
-#define MFG_SPD_MASK 0x80000
+//#define MFG_SPD_MASK 0x80000
#define MFG_GPU_QUAL_MASK 0x3
#define MFG_READ32(r) __raw_readl((void __iomem *)((unsigned long)mfg_start + (r)))
}
#endif
+static u32 check_need_univpll() {
+ u32 info = *(volatile u32 *)0xf0206174;
+ /*get_devinfo_with_index (15);*/
+ /*if(0x0 == (info & (0x1 << 31))) { t or b?*/
+ /*T*/
+ u32 devinfo = *(volatile u32* )0xf0206040;/*get_devinfo_with_index(3);*/
+ if(devinfo & 0x80000) {
+ MALI_DEBUG_PRINT(1, ("GPU use univ with devinfo 0x%x\n", devinfo));
+ return 1;
+ } else {
+#ifdef MTK_MALI_UNIV
+ MALI_DEBUG_PRINT(1, ("GPU use univ with MTK_MALI_UNIV\n"));
+ return 1;
+#else
+ return 0;
+#endif
+ }
+
+}
+
int mali_pmm_init(struct platform_device *device)
{
int err = 0;
- u32 idx = 0;
+
MALI_DEBUG_PRINT(1, ("%s\n", __FUNCTION__));
- idx = get_devinfo_with_index(3);
- if (idx & MFG_SPD_MASK)
- _need_univpll = 1;
- else
- _need_univpll = 0;
- MALI_DEBUG_PRINT(2, ("need univ src pll idx0x%d %d\n", idx, _need_univpll));
+
+ _need_univpll = check_need_univpll();
+
+ MALI_DEBUG_PRINT(1, ("need univ src pll %d\n", _need_univpll));
/* Because clkmgr may do 'default on' for some clock.
We check the clock state on init and set power state atomic.
*/
MALI_DEBUG_PRINT(1, ("MFG G3D init enable if it is on0621\n"));
-#ifndef CONFIG_MALI_DT
+
mtk_thermal_get_gpu_loading_fp = gpu_get_current_utilization;
mtk_get_gpu_loading_fp = gpu_get_current_utilization;
if (clock_is_on(MT_CG_MFG_G3D)) {
MALI_DEBUG_PRINT(1, ("MFG G3D init default off\n"));
atomic_set((atomic_t *) & bPoweroff, 1);
}
-#else
- err = mali_mfgsys_init(device);
- if (err)
- return err;
- atomic_set((atomic_t *) & bPoweroff, 1);
-#endif
+
mali_platform_power_mode_change(&(device->dev), MALI_POWER_MODE_ON);
return err;
MALI_DEBUG_PRINT(1, ("%s\n", __FUNCTION__));
mali_platform_power_mode_change(&device->dev, MALI_POWER_MODE_DEEP_SLEEP);
+#ifdef CONFIG_MALI_DT
mali_mfgsys_deinit(device);
+#endif
}
unsigned int gpu_get_current_utilization(void)
projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / commitdiff