* Remove no longer needed ->INB, ->OUTB and ->OUTBSYNC methods.
Then:
* Remove no longer used default_hwif_[mm]iops() and ide_[mm_]outbsync().
* Cleanup SuperIO handling in ns87415.c.
There should be no functional changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
if (!hwif)
return -ENODEV;
- default_hwif_mmiops(hwif);
-
state->hwif[0] = hwif;
ecard_set_drvdata(ec, state);
return -ENODEV;
hwif->chipset = ide_acorn;
- default_hwif_mmiops(hwif);
idx[0] = hwif->index;
mate = ide_find_port();
if (mate) {
- default_hwif_mmiops(mate);
-
hws[1] = &hw[1];
idx[1] = mate->index;
}
i = hwif->index;
- default_hwif_mmiops(hwif);
-
idx[0] = i;
ide_device_add(idx, &palm_bk3710_port_info, hws);
goto release;
}
- default_hwif_mmiops(hwif);
-
idx[0] = hwif->index;
ide_device_add(idx, &rapide_port_info, hws);
static inline void hwif_setup(ide_hwif_t *hwif)
{
- default_hwif_iops(hwif);
-
hwif->tf_load = h8300_tf_load;
hwif->tf_read = h8300_tf_read;
outb(val, port);
}
-static void ide_outbsync(ide_hwif_t *hwif, u8 addr, unsigned long port)
-{
- outb(addr, port);
-}
-
-void default_hwif_iops (ide_hwif_t *hwif)
-{
- hwif->OUTB = ide_outb;
- hwif->OUTBSYNC = ide_outbsync;
- hwif->INB = ide_inb;
-}
-
/*
* MMIO operations, typically used for SATA controllers
*/
writeb(value, (void __iomem *) port);
}
-static void ide_mm_outbsync(ide_hwif_t *hwif, u8 value, unsigned long port)
-{
- writeb(value, (void __iomem *) port);
-}
-
-void default_hwif_mmiops (ide_hwif_t *hwif)
-{
- hwif->OUTB = ide_mm_outb;
- /* Most systems will need to override OUTBSYNC, alas however
- this one is controller specific! */
- hwif->OUTBSYNC = ide_mm_outbsync;
- hwif->INB = ide_mm_inb;
-}
-
-EXPORT_SYMBOL(default_hwif_mmiops);
-
void SELECT_DRIVE (ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
init_completion(&hwif->gendev_rel_comp);
- default_hwif_iops(hwif);
default_hwif_transport(hwif);
ide_port_init_devices_data(hwif);
plat_ide_setup_ports(&hw, base, alt_base, pdata, res_irq->start);
hw.dev = &pdev->dev;
- if (mmio) {
+ if (mmio)
d.host_flags |= IDE_HFLAG_MMIO;
- default_hwif_mmiops(hwif);
- }
idx[0] = hwif->index;
if (hwif == NULL)
goto err;
- /* Setup MMIO ops. */
- default_hwif_mmiops(hwif);
-
idx[0] = hwif->index;
ide_device_add(idx, &swarm_port_info, hws);
*/
#include <asm/superio.h>
-static unsigned long superio_ide_status[2];
-static unsigned long superio_ide_select[2];
-static unsigned long superio_ide_dma_status[2];
-
#define SUPERIO_IDE_MAX_RETRIES 25
/* Because of a defect in Super I/O, all reads of the PCI DMA status
*/
static u8 superio_ide_inb (unsigned long port)
{
- if (port == superio_ide_status[0] ||
- port == superio_ide_status[1] ||
- port == superio_ide_select[0] ||
- port == superio_ide_select[1] ||
- port == superio_ide_dma_status[0] ||
- port == superio_ide_dma_status[1]) {
- u8 tmp;
- int retries = SUPERIO_IDE_MAX_RETRIES;
-
- /* printk(" [ reading port 0x%x with retry ] ", port); */
+ u8 tmp;
+ int retries = SUPERIO_IDE_MAX_RETRIES;
- do {
- tmp = inb(port);
- if (tmp == 0)
- udelay(50);
- } while (tmp == 0 && retries-- > 0);
+ /* printk(" [ reading port 0x%x with retry ] ", port); */
- return tmp;
- }
+ do {
+ tmp = inb(port);
+ if (tmp == 0)
+ udelay(50);
+ } while (tmp == 0 && retries-- > 0);
- return inb(port);
+ return tmp;
}
static u8 superio_read_status(ide_hwif_t *hwif)
static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
{
struct pci_dev *pdev = to_pci_dev(hwif->dev);
- u32 base, dmabase;
+ u32 dma_stat;
u8 port = hwif->channel, tmp;
- base = pci_resource_start(pdev, port * 2) & ~3;
- dmabase = pci_resource_start(pdev, 4) & ~3;
-
- superio_ide_status[port] = base + 7;
- superio_ide_select[port] = base + 6;
- superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa);
+ dma_stat = (pci_resource_start(pdev, 4) & ~3) + (!port ? 2 : 0xa);
/* Clear error/interrupt, enable dma */
- tmp = superio_ide_inb(superio_ide_dma_status[port]);
- outb(tmp | 0x66, superio_ide_dma_status[port]);
+ tmp = superio_ide_inb(dma_stat);
+ outb(tmp | 0x66, dma_stat);
hwif->read_status = superio_read_status;
hwif->read_sff_dma_status = superio_read_sff_dma_status;
hwif->tf_read = superio_tf_read;
- /* We need to override inb to workaround a SuperIO errata */
- hwif->INB = superio_ide_inb;
}
static void __devinit init_iops_ns87415(ide_hwif_t *hwif)
out_be32((void*)port, addr);
}
-static void scc_ide_outbsync(ide_hwif_t *hwif, u8 addr, unsigned long port)
-{
- out_be32((void*)port, addr);
- eieio();
- in_be32((void*)(hwif->dma_base + 0x01c));
- eieio();
-}
-
static void
scc_ide_outsw(unsigned long port, void *addr, u32 count)
{
hwif->input_data = scc_input_data;
hwif->output_data = scc_output_data;
- hwif->INB = scc_ide_inb;
- hwif->OUTB = scc_ide_outb;
- hwif->OUTBSYNC = scc_ide_outbsync;
-
hwif->dma_base = dma_base;
hwif->config_data = ports->ctl;
}
if (hwif == NULL)
goto err;
- /* The IOC4 uses MMIO rather than Port IO. */
- default_hwif_mmiops(hwif);
-
/* Initializing chipset IRQ Registers */
writel(0x03, (void __iomem *)(irqport + IOC4_INTR_SET * 4));
* Fill in the basic hwif bits
*/
hwif->host_flags |= IDE_HFLAG_MMIO;
- default_hwif_mmiops(hwif);
+
hwif->hwif_data = addr;
/*
pmac_ide_selectproc(drive);
}
-static void pmac_outbsync(ide_hwif_t *hwif, u8 value, unsigned long port)
-{
- u32 tmp;
-
- writeb(value, (void __iomem *) port);
- tmp = readl((void __iomem *)(hwif->io_ports.data_addr
- + IDE_TIMING_CONFIG));
-}
-
static void pmac_exec_command(ide_hwif_t *hwif, u8 cmd)
{
writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
hwif->exec_command = pmac_exec_command;
hwif->set_irq = pmac_set_irq;
- /* Setup MMIO ops */
- default_hwif_mmiops(hwif);
- hwif->OUTBSYNC = pmac_outbsync;
-
idx[0] = hwif->index;
ide_device_add(idx, &d, hws);
void (*ide_dma_clear_irq)(ide_drive_t *drive);
- void (*OUTB)(u8 addr, unsigned long port);
- void (*OUTBSYNC)(struct hwif_s *hwif, u8 addr, unsigned long port);
-
- u8 (*INB)(unsigned long port);
-
/* dma physical region descriptor table (cpu view) */
unsigned int *dmatable_cpu;
/* dma physical region descriptor table (dma view) */
}
#endif
-extern void default_hwif_iops(ide_hwif_t *);
-extern void default_hwif_mmiops(ide_hwif_t *);
extern void default_hwif_transport(ide_hwif_t *);
typedef struct ide_pci_enablebit_s {