clk: meson: gxbb: fix clk_mclk_i958 divider flags
authorJerome Brunet <jbrunet@baylibre.com>
Thu, 27 Jul 2017 13:09:40 +0000 (15:09 +0200)
committerNeil Armstrong <narmstrong@baylibre.com>
Fri, 4 Aug 2017 16:01:59 +0000 (18:01 +0200)
CLK_DIVIDER_ROUND_CLOSEST was incorrectly put in the hw.init flags
while it should have been in the divider flags

Fixes: 3c277c247eab ("clk: meson: gxbb: add cts_mclk_i958")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
drivers/clk/meson/gxbb.c

index 0bd028adadd5cc493d574c21ea665ccbe63d1444..60342cfb0bf61d056f419777ba71ae5cec45713c 100644 (file)
@@ -876,7 +876,7 @@ static struct clk_mux gxbb_cts_mclk_i958_sel = {
        /* Default parent unknown (register reset value: 0) */
        .table = (u32[]){ 1, 2, 3 },
        .lock = &clk_lock,
-               .hw.init = &(struct clk_init_data){
+       .hw.init = &(struct clk_init_data) {
                .name = "cts_mclk_i958_sel",
                .ops = &clk_mux_ops,
                .parent_names = (const char *[]){ "mpll0", "mpll1", "mpll2" },
@@ -890,12 +890,13 @@ static struct clk_divider gxbb_cts_mclk_i958_div = {
        .shift = 16,
        .width = 8,
        .lock = &clk_lock,
-       .hw.init = &(struct clk_init_data){
+       .flags = CLK_DIVIDER_ROUND_CLOSEST,
+       .hw.init = &(struct clk_init_data) {
                .name = "cts_mclk_i958_div",
                .ops = &clk_divider_ops,
                .parent_names = (const char *[]){ "cts_mclk_i958_sel" },
                .num_parents = 1,
-               .flags = CLK_SET_RATE_PARENT | CLK_DIVIDER_ROUND_CLOSEST,
+               .flags = CLK_SET_RATE_PARENT,
        },
 };