[ARM] S3C24XX: GPIO: Add S3C64XX style GPIO numbering

Move the new style of GPIO numbering by using a single
macro for each GPIO bank. This means S3C2410_GPA0 becomes
S3C2410_GPA(0), and so on.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
index ce1ec69806a1a9a2e878f043bd9c189a476839cd..5213e453df1c927b1e429729ef43ec89b3168e89 100644 (file)
--- a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
@@ -11,6 +11,9 @@
  * published by the Free Software Foundation.
 */
 
+#ifndef __MACH_GPIONRS_H
+#define __MACH_GPIONRS_H
+
 #define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
 
 #define S3C2410_GPIO_BANKA   (32*0)
@@ -21,3 +24,49 @@
 #define S3C2410_GPIO_BANKF   (32*5)
 #define S3C2410_GPIO_BANKG   (32*6)
 #define S3C2410_GPIO_BANKH   (32*7)
+
+/* GPIO bank sizes */
+#define S3C2410_GPIO_A_NR      (32)
+#define S3C2410_GPIO_B_NR      (32)
+#define S3C2410_GPIO_C_NR      (32)
+#define S3C2410_GPIO_D_NR      (32)
+#define S3C2410_GPIO_E_NR      (32)
+#define S3C2410_GPIO_F_NR      (32)
+#define S3C2410_GPIO_G_NR      (32)
+#define S3C2410_GPIO_H_NR      (32)
+
+#if CONFIG_S3C_GPIO_SPACE != 0
+#error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment
+#endif
+
+#define S3C2410_GPIO_NEXT(__gpio) \
+       ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
+
+#ifndef __ASSEMBLY__
+
+enum s3c_gpio_number {
+       S3C2410_GPIO_A_START = 0,
+       S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
+       S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
+       S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
+       S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
+       S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
+       S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
+       S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
+};
+
+#endif /* __ASSEMBLY__ */
+
+/* S3C2410 GPIO number definitions. */
+
+#define S3C2410_GPA(_nr)       (S3C2410_GPIO_A_START + (_nr))
+#define S3C2410_GPB(_nr)       (S3C2410_GPIO_B_START + (_nr))
+#define S3C2410_GPC(_nr)       (S3C2410_GPIO_C_START + (_nr))
+#define S3C2410_GPD(_nr)       (S3C2410_GPIO_D_START + (_nr))
+#define S3C2410_GPE(_nr)       (S3C2410_GPIO_E_START + (_nr))
+#define S3C2410_GPF(_nr)       (S3C2410_GPIO_F_START + (_nr))
+#define S3C2410_GPG(_nr)       (S3C2410_GPIO_G_START + (_nr))
+#define S3C2410_GPH(_nr)       (S3C2410_GPIO_H_START + (_nr))
+
+#endif /* __MACH_GPIONRS_H */
+