Remove unused nsbr count from PCIe Gen3 code
Reviewed-by: Stuart Summers <john.s.summers@intel.com>
Signed-off-by: Dean Luick <dean.luick@intel.com>
Signed-off-by: Jubin John <jubin.john@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
uint default_pset;
u16 target_vector, target_speed;
u16 lnkctl2, vendor;
- u8 nsbr = 1;
u8 div;
const u8 (*eq)[3];
int return_error = 0;
return 0;
}
- /*
- * A0 needs an additional SBR
- */
- if (is_ax(dd))
- nsbr++;
-
/*
* Do the Gen3 transition. Steps are those of the PCIe Gen3
* recipe.