MIPS: jz4740: Correct clock gate bit for DMA controller

Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

diff --git a/arch/mips/jz4740/clock.c b/arch/mips/jz4740/clock.c
index 484d38a0864fe875f5d93469bb51323fe8ec3b2f..1b5f55426cad50be1b7477b793716ecde255954d 100644 (file)
--- a/arch/mips/jz4740/clock.c
+++ b/arch/mips/jz4740/clock.c
@@ -687,7 +687,7 @@ static struct clk jz4740_clock_simple_clks[] = {
        [3] = {
                .name = "dma",
                .parent = &jz_clk_high_speed_peripheral.clk,
-               .gate_bit = JZ_CLOCK_GATE_UART0,
+               .gate_bit = JZ_CLOCK_GATE_DMAC,
                .ops = &jz_clk_simple_ops,
        },
        [4] = {