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sr: add support for tl1 [1/1]
authorwenfeng.guo <wenfeng.guo@amlogic.com>
Mon, 12 Nov 2018 03:15:24 +0000 (11:15 +0800)
committerBo Yang <bo.yang@amlogic.com>
Tue, 27 Nov 2018 11:22:56 +0000 (03:22 -0800)
PD#172587

Problem:
Add sr driver support for tl1

Solution:
add sr driver support for tl1
fix horizontal line when play video on 4K screen

Verify:
TL1 X301

Change-Id: I422f27eb5cf12f69dc57de295425536671e2df38
Signed-off-by: wenfeng.guo <wenfeng.guo@amlogic.com>
drivers/amlogic/media/video_sink/video.c patch | blob | blame | history
drivers/amlogic/media/video_sink/vpp.c patch | blob | blame | history
include/linux/amlogic/media/video_sink/vpp.h patch | blob | blame | history

diff --git a/drivers/amlogic/media/video_sink/video.c b/drivers/amlogic/media/video_sink/video.c
index 0c1b20585569290a55861f8a779b0a6462234d85..fd6adc0a56b6ee495e2d7e049ef8b5d58031b956 100644 (file)
--- a/drivers/amlogic/media/video_sink/video.c
+++ b/drivers/amlogic/media/video_sink/video.c
@@ -1340,9 +1340,13 @@ static void vpp_settings_h(struct vpp_frame_par_s *framePtr)
        r3 = framePtr->VPP_hsc_endp - framePtr->VPP_hsc_startp;
 
        if ((framePtr->supscl_path == CORE0_PPS_CORE1) ||
-               (framePtr->supscl_path == CORE1_AFTER_PPS))
+               (framePtr->supscl_path == CORE1_AFTER_PPS) ||
+               (framePtr->supscl_path == PPS_CORE0_CORE1) ||
+               (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
                r3 >>= framePtr->supsc1_hori_ratio;
-       if (framePtr->supscl_path == CORE0_AFTER_PPS)
+       if ((framePtr->supscl_path == CORE0_AFTER_PPS) ||
+               (framePtr->supscl_path == PPS_CORE0_CORE1) ||
+               (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
                r3 >>= framePtr->supsc0_hori_ratio;
 
        if (platform_type == 1) {
@@ -1609,9 +1613,12 @@ static void vpp_settings_v(struct vpp_frame_par_s *framePtr)
                          ((r & VPP_REGION_MASK) << VPP_REGION4_BIT));
 
        if ((framePtr->supscl_path == CORE0_PPS_CORE1) ||
-               (framePtr->supscl_path == CORE1_AFTER_PPS))
+               (framePtr->supscl_path == CORE1_AFTER_PPS) ||
+               (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
                r >>= framePtr->supsc1_vert_ratio;
-       if (framePtr->supscl_path == CORE0_AFTER_PPS)
+       if ((framePtr->supscl_path == CORE0_AFTER_PPS) ||
+               (framePtr->supscl_path == PPS_CORE0_CORE1) ||
+               (framePtr->supscl_path == PPS_CORE0_POSTBLEND_CORE1))
                r >>= framePtr->supsc0_vert_ratio;
 
        VSYNC_WR_MPEG_REG(VPP_VSC_REGION4_ENDP + cur_dev->vpp_off, r);
@@ -6499,7 +6506,7 @@ SET_FILTER:
                                VPP_VD1_PREBLEND |
                                VPP_VD2_POSTBLEND |
                                VPP_VD1_POSTBLEND |
-                               7);
+                               0xf);
                        if ((vpp_misc_set & VPP_VD2_PREBLEND)
                                && (vpp_misc_set & VPP_VD1_PREBLEND))
                                set_value |= VPP_PREBLEND_EN;
diff --git a/drivers/amlogic/media/video_sink/vpp.c b/drivers/amlogic/media/video_sink/vpp.c
index b663469a5593fa346aa37058307e5d64257e3547..2f003b8944a8bc1843910b20a8fd8fd58d894ae4 100644 (file)
--- a/drivers/amlogic/media/video_sink/vpp.c
+++ b/drivers/amlogic/media/video_sink/vpp.c
@@ -408,6 +408,7 @@ module_param(force_filter_mode, int, 0664);
 bool super_scaler = true;
 static unsigned int sr_support;
 static u32 sr_reg_offt;
+static u32 sr_reg_offt2;       /*for tl1*/
 static unsigned int super_debug;
 module_param(super_debug, uint, 0664);
 MODULE_PARM_DESC(super_debug, "super_debug");
@@ -1727,7 +1728,7 @@ int vpp_set_super_scaler_regs(int scaler_path_sel,
                tmp_data = sharpness1_sr2_ctrl_32d7;
        else
                tmp_data = VSYNC_RD_MPEG_REG(
-                       SRSHARP1_SHARP_SR2_CTRL + sr_reg_offt);
+                       SRSHARP1_SHARP_SR2_CTRL + sr_reg_offt2);/*0xc80*/
        if (is_meson_gxtvbb_cpu() ||
                (((tmp_data >> 5)&0x1) != (reg_srscl1_vert_ratio&0x1)) ||
                (((tmp_data >> 4)&0x1) != (reg_srscl1_hori_ratio&0x1)) ||
@@ -1743,7 +1744,7 @@ int vpp_set_super_scaler_regs(int scaler_path_sel,
                tmp_data |= (((~(reg_srscl1_hori_ratio&0x1))&0x1) << 0);
                if (sr0_sr1_refresh) {
                        VSYNC_WR_MPEG_REG(
-                               SRSHARP1_SHARP_SR2_CTRL + sr_reg_offt,
+                               SRSHARP1_SHARP_SR2_CTRL + sr_reg_offt2,/*0xc80*/
                                tmp_data);
                        sharpness1_sr2_ctrl_32d7 = tmp_data;
                }
@@ -1765,17 +1766,20 @@ int vpp_set_super_scaler_regs(int scaler_path_sel,
        if (sr_support & SUPER_CORE1_SUPPORT) {
                if (get_cpu_type() != MESON_CPU_MAJOR_ID_GXTVBB)
                        tmp_data2 = VSYNC_RD_MPEG_REG(
-                               SRSHARP1_SHARP_HVSIZE);
+                               SRSHARP1_SHARP_HVSIZE + sr_reg_offt2);
                if (is_meson_gxtvbb_cpu() || (tmp_data != tmp_data2)) {
                        VSYNC_WR_MPEG_REG(
-                               SRSHARP1_SHARP_HVSIZE, tmp_data);
+                               SRSHARP1_SHARP_HVSIZE + sr_reg_offt2, tmp_data);
                        if (is_meson_gxtvbb_cpu())
                                sharpness1_sr2_ctrl_3280 = tmp_data;
                }
        }
 
        /*ve input size setting*/
-       if (is_meson_txhd_cpu() || is_meson_g12a_cpu() || is_meson_g12b_cpu())
+       if (is_meson_txhd_cpu() || is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
+               (is_meson_tl1_cpu() &&
+               ((scaler_path_sel == PPS_CORE0_CORE1) ||
+               (scaler_path_sel == PPS_CORE0_POSTBLEND_CORE1))))
                tmp_data = ((reg_srscl0_hsize & 0x1fff) << 16) |
                        (reg_srscl0_vsize & 0x1fff);
        else
@@ -1786,7 +1790,7 @@ int vpp_set_super_scaler_regs(int scaler_path_sel,
                VSYNC_WR_MPEG_REG(VPP_VE_H_V_SIZE, tmp_data);
        /*chroma blue stretch size setting*/
        if (is_meson_txlx_cpu() || is_meson_txhd_cpu() || is_meson_g12a_cpu() ||
-               is_meson_g12b_cpu()) {
+               is_meson_g12b_cpu() || is_meson_tl1_cpu()) {
                tmp_data = (((vpp_postblend_out_width & 0x1fff) << 16) |
                        (vpp_postblend_out_height & 0x1fff));
                VSYNC_WR_MPEG_REG(VPP_OUT_H_V_SIZE, tmp_data);
@@ -1815,7 +1819,23 @@ int vpp_set_super_scaler_regs(int scaler_path_sel,
                data_path_chose = 6;
        else
                data_path_chose = 5;
-       if ((scaler_path_sel == CORE0_PPS_CORE1) ||
+       if (is_meson_tl1_cpu()) {
+               if (scaler_path_sel == CORE0_PPS_CORE1) {
+                       VSYNC_WR_MPEG_REG_BITS(VPP_MISC, 1, 1, 1);
+                       VSYNC_WR_MPEG_REG_BITS(VPP_MISC, 1, 3, 1);
+               } else if (scaler_path_sel == CORE0_CORE1_PPS) {
+                       VSYNC_WR_MPEG_REG_BITS(VPP_MISC, 1, 1, 1);
+                       VSYNC_WR_MPEG_REG_BITS(VPP_MISC, 0, 3, 1);
+
+               } else if (scaler_path_sel == PPS_CORE0_CORE1) {
+                       VSYNC_WR_MPEG_REG_BITS(VPP_MISC, 0, 1, 1);
+                       VSYNC_WR_MPEG_REG_BITS(VPP_MISC, 1, 3, 1);
+
+               } else if (scaler_path_sel == PPS_CORE0_POSTBLEND_CORE1) {
+                       VSYNC_WR_MPEG_REG_BITS(VPP_MISC, 0, 1, 1);
+                       VSYNC_WR_MPEG_REG_BITS(VPP_MISC, 0, 3, 1);
+               }
+       } else if ((scaler_path_sel == CORE0_PPS_CORE1) ||
                (scaler_path_sel == CORE1_BEFORE_PPS) ||
                (scaler_path_sel == CORE0_BEFORE_PPS)) {
                if (is_meson_g12a_cpu() || is_meson_g12b_cpu())
@@ -1971,12 +1991,16 @@ static void vpp_set_super_scaler(const struct vinfo_s *vinfo,
 
        /*patch for width align 2*/
        if (super_scaler && (width_out%2) &&
-               (((next_frame_par->supscl_path == CORE0_AFTER_PPS) &&
+               ((((next_frame_par->supscl_path == CORE0_AFTER_PPS) ||
+               (next_frame_par->supscl_path == PPS_CORE0_CORE1) ||
+               (next_frame_par->supscl_path == PPS_CORE0_POSTBLEND_CORE1)) &&
                next_frame_par->supsc0_hori_ratio) ||
                (((next_frame_par->supscl_path == CORE0_PPS_CORE1) ||
                (next_frame_par->supscl_path == CORE0_CORE1_PPS) ||
                (next_frame_par->supscl_path == CORE1_AFTER_PPS) ||
-               (next_frame_par->supscl_path == CORE0_BEFORE_PPS)) &&
+               (next_frame_par->supscl_path == CORE0_BEFORE_PPS) ||
+               (next_frame_par->supscl_path == PPS_CORE0_CORE1) ||
+               (next_frame_par->supscl_path == PPS_CORE0_POSTBLEND_CORE1)) &&
                next_frame_par->supsc1_hori_ratio))) {
                temp = next_frame_par->VPP_hsc_endp;
                if (++temp >= vinfo->width) {
@@ -1984,15 +2008,35 @@ static void vpp_set_super_scaler(const struct vinfo_s *vinfo,
                                (next_frame_par->VPP_hsc_startp <
                                next_frame_par->VPP_hsc_endp))
                                next_frame_par->VPP_hsc_startp--;
-                       else if (next_frame_par->supscl_path ==
-                               CORE0_AFTER_PPS) {
+                       else if (((next_frame_par->supscl_path ==
+                               PPS_CORE0_CORE1) ||
+                               (next_frame_par->supscl_path ==
+                               PPS_CORE0_POSTBLEND_CORE1)) &&
+                               next_frame_par->supsc0_hori_ratio &&
+                               next_frame_par->supsc1_hori_ratio) {
+                               next_frame_par->supsc1_enable = 0;
+                               next_frame_par->supsc1_hori_ratio = 0;
+                               next_frame_par->supsc1_vert_ratio = 0;
+                               next_frame_par->VPP_hsc_endp++;
+                       } else if ((next_frame_par->supscl_path ==
+                               CORE0_AFTER_PPS) ||
+                               (((next_frame_par->supscl_path ==
+                               PPS_CORE0_CORE1) ||
+                               (next_frame_par->supscl_path ==
+                               PPS_CORE0_POSTBLEND_CORE1)) &&
+                               next_frame_par->supsc0_hori_ratio)) {
                                next_frame_par->supsc0_enable = 0;
                                next_frame_par->supsc0_hori_ratio = 0;
                                next_frame_par->supsc0_vert_ratio = 0;
                        } else if ((next_frame_par->supscl_path ==
                                CORE1_AFTER_PPS) ||
                                (next_frame_par->supscl_path ==
-                               CORE0_PPS_CORE1)) {
+                               CORE0_PPS_CORE1) ||
+                               (((next_frame_par->supscl_path ==
+                               PPS_CORE0_CORE1) ||
+                               (next_frame_par->supscl_path ==
+                               PPS_CORE0_POSTBLEND_CORE1)) &&
+                               next_frame_par->supsc1_hori_ratio)) {
                                next_frame_par->supsc1_enable = 0;
                                next_frame_par->supsc1_hori_ratio = 0;
                                next_frame_par->supsc1_vert_ratio = 0;
@@ -2004,12 +2048,16 @@ static void vpp_set_super_scaler(const struct vinfo_s *vinfo,
 
        /*patch for height align 2*/
        if (super_scaler && (height_out%2) &&
-               (((next_frame_par->supscl_path == CORE0_AFTER_PPS) &&
+               ((((next_frame_par->supscl_path == CORE0_AFTER_PPS) ||
+               (next_frame_par->supscl_path == PPS_CORE0_CORE1) ||
+               (next_frame_par->supscl_path == PPS_CORE0_POSTBLEND_CORE1)) &&
                next_frame_par->supsc0_vert_ratio) ||
                (((next_frame_par->supscl_path == CORE0_PPS_CORE1) ||
                (next_frame_par->supscl_path == CORE0_CORE1_PPS) ||
                (next_frame_par->supscl_path == CORE1_AFTER_PPS) ||
-               (next_frame_par->supscl_path == CORE0_BEFORE_PPS)) &&
+               (next_frame_par->supscl_path == CORE0_BEFORE_PPS) ||
+               (next_frame_par->supscl_path == PPS_CORE0_CORE1) ||
+               (next_frame_par->supscl_path == PPS_CORE0_POSTBLEND_CORE1)) &&
                next_frame_par->supsc1_vert_ratio))) {
                temp = next_frame_par->VPP_vsc_endp;
                if (++temp >= vinfo->height) {
@@ -2017,15 +2065,35 @@ static void vpp_set_super_scaler(const struct vinfo_s *vinfo,
                                (next_frame_par->VPP_vsc_startp <
                                next_frame_par->VPP_vsc_endp))
                                next_frame_par->VPP_vsc_startp--;
-                       else if (next_frame_par->supscl_path ==
-                               CORE0_AFTER_PPS) {
+                       else if (((next_frame_par->supscl_path ==
+                               PPS_CORE0_CORE1) ||
+                               (next_frame_par->supscl_path ==
+                               PPS_CORE0_POSTBLEND_CORE1)) &&
+                               next_frame_par->supsc0_vert_ratio &&
+                               next_frame_par->supsc1_vert_ratio) {
+                               next_frame_par->supsc0_enable = 0;
+                               next_frame_par->supsc0_hori_ratio = 0;
+                               next_frame_par->supsc0_vert_ratio = 0;
+                               next_frame_par->VPP_vsc_endp++;
+                       } else if ((next_frame_par->supscl_path ==
+                               CORE0_AFTER_PPS) ||
+                               (((next_frame_par->supscl_path ==
+                               PPS_CORE0_CORE1) ||
+                               (next_frame_par->supscl_path ==
+                               PPS_CORE0_POSTBLEND_CORE1)) &&
+                               next_frame_par->supsc0_vert_ratio)) {
                                next_frame_par->supsc0_enable = 0;
                                next_frame_par->supsc0_hori_ratio = 0;
                                next_frame_par->supsc0_vert_ratio = 0;
                        } else if ((next_frame_par->supscl_path ==
                                CORE1_AFTER_PPS) ||
                                (next_frame_par->supscl_path ==
-                               CORE0_PPS_CORE1)) {
+                               CORE0_PPS_CORE1) ||
+                               (((next_frame_par->supscl_path ==
+                               PPS_CORE0_CORE1) ||
+                               (next_frame_par->supscl_path ==
+                               PPS_CORE0_POSTBLEND_CORE1)) &&
+                               next_frame_par->supsc1_vert_ratio)) {
                                next_frame_par->supsc1_enable = 0;
                                next_frame_par->supsc1_hori_ratio = 0;
                                next_frame_par->supsc1_vert_ratio = 0;
@@ -2048,6 +2116,15 @@ static void vpp_set_super_scaler(const struct vinfo_s *vinfo,
                        height_out >> next_frame_par->supsc0_vert_ratio;
                next_frame_par->spsc0_w_in =
                        width_out >> next_frame_par->supsc0_hori_ratio;
+       } else if ((next_frame_par->supscl_path == PPS_CORE0_CORE1)
+                       || (next_frame_par->supscl_path ==
+                       PPS_CORE0_POSTBLEND_CORE1)){/*tl1*/
+               next_frame_par->spsc0_h_in =
+                       (height_out >> next_frame_par->supsc0_vert_ratio) >>
+                               next_frame_par->supsc1_vert_ratio;
+               next_frame_par->spsc0_w_in =
+                       (width_out >> next_frame_par->supsc0_hori_ratio) >>
+                       next_frame_par->supsc1_hori_ratio;
        } else {
                next_frame_par->spsc0_h_in = src_height;
                next_frame_par->spsc0_w_in = src_width;
@@ -2055,7 +2132,9 @@ static void vpp_set_super_scaler(const struct vinfo_s *vinfo,
        if ((next_frame_par->supscl_path == CORE0_PPS_CORE1) ||
                (next_frame_par->supscl_path == CORE0_CORE1_PPS) ||
                (next_frame_par->supscl_path == CORE1_AFTER_PPS) ||
-               (next_frame_par->supscl_path == CORE0_BEFORE_PPS)) {
+               (next_frame_par->supscl_path == CORE0_BEFORE_PPS) ||
+               (next_frame_par->supscl_path == PPS_CORE0_CORE1) ||
+               (next_frame_par->supscl_path == PPS_CORE0_POSTBLEND_CORE1)) {
                next_frame_par->spsc1_h_in =
                        (height_out >> next_frame_par->supsc1_vert_ratio);
                next_frame_par->spsc1_w_in =
@@ -2663,7 +2742,7 @@ void vpp_super_scaler_support(void)
                sr_support |= SUPER_CORE0_SUPPORT;
                sr_support &= ~SUPER_CORE1_SUPPORT;
        } else if (is_meson_gxtvbb_cpu() || is_meson_txl_cpu() ||
-               is_meson_txlx_cpu()) {
+               is_meson_txlx_cpu() || is_meson_tl1_cpu()) {
                sr_support |= SUPER_CORE0_SUPPORT;
                sr_support |= SUPER_CORE1_SUPPORT;
        } else {
@@ -2674,12 +2753,16 @@ void vpp_super_scaler_support(void)
                sr_support &= ~SUPER_CORE0_SUPPORT;
                sr_support &= ~SUPER_CORE1_SUPPORT;
        }
-       scaler_path_sel = SCALER_PATH_MAX;
-       if (is_meson_g12a_cpu() || is_meson_g12b_cpu()
-               || is_meson_tl1_cpu())
+       if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
                sr_reg_offt = 0xc00;
-       else
+               sr_reg_offt2 = 0x00;
+       } else if (is_meson_tl1_cpu()) {
+               sr_reg_offt = 0xc00;
+               sr_reg_offt2 = 0xc80;
+       } else {
                sr_reg_offt = 0;
+               sr_reg_offt2 = 0x00;
+       }
 }
 /*for gxlx only have core1 which will affact pip line*/
 void vpp_bypass_ratio_config(void)
diff --git a/include/linux/amlogic/media/video_sink/vpp.h b/include/linux/amlogic/media/video_sink/vpp.h
index b4293104c838cb5d5184fa9c50922c88fbef25fe..8f2c7db79ec9e4215b98744b0cb668197ff96d1d 100644 (file)
--- a/include/linux/amlogic/media/video_sink/vpp.h
+++ b/include/linux/amlogic/media/video_sink/vpp.h
@@ -159,14 +159,17 @@ extern bool reverse;
 extern bool platform_type;
 
 enum select_scaler_path_e {
-       CORE0_PPS_CORE1 = 0,
-       CORE0_CORE1_PPS,
+       CORE0_PPS_CORE1 = 0,    /*CORE0_PPS_CORE1_POSTBLEND*/
+       CORE0_CORE1_PPS,        /*CORE0_PPS_POSTBLEND_CORE1*/
        /*gxlx only have core1,support below two mode*/
        CORE1_BEFORE_PPS,
        CORE1_AFTER_PPS,
        /*txhd only have core0,support below two mode*/
        CORE0_BEFORE_PPS,
        CORE0_AFTER_PPS,
+       /*tl1 have core0/core1, support below mode*/
+       PPS_CORE0_CORE1,
+       PPS_CORE0_POSTBLEND_CORE1,
        SCALER_PATH_MAX,
 };
 /*