ixgbe: A fix to VF TX rate limit

There is a need to configure MMW_SIZE in register RTTBCNRM with a correct
value (0x4 for non jumbo frames and 0x14 for jumbo frames support).
For 82599 the value is 0x4 and for X540 the value is 0x14.

Signed-off-by: Lior Levy <lior.levy@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

diff --git a/drivers/net/ixgbe/ixgbe_sriov.c b/drivers/net/ixgbe/ixgbe_sriov.c
index ac99b0458fe2f2f6b1e29351465838e696ad9f64..d99d01e21326dff47e67c60c8f3ead92c7ed1e82 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_sriov.c
+++ b/drivers/net/ixgbe/ixgbe_sriov.c
@@ -605,6 +605,22 @@ static void ixgbe_set_vf_rate_limit(struct ixgbe_hw *hw, int vf, int tx_rate,
        }
 
        IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, 2*vf); /* vf Y uses queue 2*Y */
+       /*
+        * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
+        * register. Typically MMW_SIZE=0x014 if 9728-byte jumbo is supported
+        * and 0x004 otherwise.
+        */
+       switch (hw->mac.type) {
+       case ixgbe_mac_82599EB:
+               IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, 0x4);
+               break;
+       case ixgbe_mac_X540:
+               IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, 0x14);
+               break;
+       default:
+               break;
+       }
+
        IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
 }
 

diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index 1eefc0c6840980aab3f321c50bfe161812594ba1..e0d970ebab7a26d7b5be056d0ec4eba125ae4bb7 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -534,7 +534,7 @@
 #define IXGBE_RTTBCNRC_RF_INT_SHIFT    14
 #define IXGBE_RTTBCNRC_RF_INT_MASK     \
        (IXGBE_RTTBCNRC_RF_DEC_MASK << IXGBE_RTTBCNRC_RF_INT_SHIFT)
-
+#define IXGBE_RTTBCNRM    0x04980
 
 /* FCoE DMA Context Registers */
 #define IXGBE_FCPTRL    0x02410 /* FC User Desc. PTR Low */