ath9k_hw: Add capability flag for Antenna diversity and combining feature
authorVasanthakumar Thiagarajan <vasanth@atheros.com>
Thu, 2 Sep 2010 08:34:41 +0000 (01:34 -0700)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 7 Sep 2010 17:54:33 +0000 (13:54 -0400)
This is enabled only for ar9285.

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/eeprom.h
drivers/net/wireless/ath/ath9k/eeprom_4k.c
drivers/net/wireless/ath/ath9k/hw.c
drivers/net/wireless/ath/ath9k/hw.h

index 7f48df1e2903008f0a68bf991817bee64edf5b81..090778da5d675712dc2d1905f5760466fb63732f 100644 (file)
@@ -266,6 +266,8 @@ enum eeprom_param {
        EEP_INTERNAL_REGULATOR,
        EEP_SWREG,
        EEP_PAPRD,
+       EEP_MODAL_VER,
+       EEP_ANT_DIV_CTL1,
 };
 
 enum ar5416_rates {
index 9cccd12e8f2131aa176740b7cc9e940d6e3a582f..2e1397b68a87eb14e0d56b1519bec5c361e78091 100644 (file)
@@ -213,6 +213,10 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
                return 0;
        case EEP_PWR_TABLE_OFFSET:
                return AR5416_PWR_TABLE_OFFSET_DB;
+       case EEP_MODAL_VER:
+               return pModal->version;
+       case EEP_ANT_DIV_CTL1:
+               return pModal->antdiv_ctl1;
        default:
                return 0;
        }
index 3384ca1645622e4d3307d957ff193198f6b7e888..68940a8864e0abee17132cfcfba5a4af269b7189 100644 (file)
@@ -2056,6 +2056,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
        struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 
        u16 capField = 0, eeval;
+       u8 ant_div_ctl1;
 
        eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
        regulatory->current_rd = eeval;
@@ -2280,6 +2281,14 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
        if (AR_SREV_9287_10_OR_LATER(ah) || AR_SREV_9271(ah))
                pCap->hw_caps |= ATH9K_HW_CAP_SGI_20;
 
+       if (AR_SREV_9285(ah))
+               if (ah->eep_ops->get_eeprom(ah, EEP_MODAL_VER) >= 3) {
+                       ant_div_ctl1 =
+                               ah->eep_ops->get_eeprom(ah, EEP_ANT_DIV_CTL1);
+                       if ((ant_div_ctl1 & 0x1) && ((ant_div_ctl1 >> 3) & 0x1))
+                               pCap->hw_caps |= ATH9K_HW_CAP_ANT_DIV_COMB;
+               }
+
        return 0;
 }
 
index 1601dd43989064b9bc070fa58741b7978cfbda88..1a0efbd03e4fb637ba6bac26de80eec00b25f115 100644 (file)
@@ -204,6 +204,7 @@ enum ath9k_hw_caps {
        ATH9K_HW_CAP_FASTCLOCK                  = BIT(20),
        ATH9K_HW_CAP_SGI_20                     = BIT(21),
        ATH9K_HW_CAP_PAPRD                      = BIT(22),
+       ATH9K_HW_CAP_ANT_DIV_COMB               = BIT(23),
 };
 
 struct ath9k_hw_capabilities {