ARM: i.MX5: Add nand oftree support

This adds snippets to the i.MX51/53 devicetrees for the nand
flash controller.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index bfa65abe8ef29444f4a56ca88c7fa1fd05591a47..39eb88e9971cdc3ebeb74d9ce8dc9b6deb7e7484 100644 (file)
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -259,6 +259,13 @@
                                status = "disabled";
                        };
 
+                       nand@83fdb000 {
+                               compatible = "fsl,imx51-nand";
+                               reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
+                               interrupts = <8>;
+                               status = "disabled";
+                       };
+
                        ssi3: ssi@83fe8000 {
                                compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
                                reg = <0x83fe8000 0x4000>;

diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index e3e869470cd3e4f6dc5f56daf2645f85bf6f14bc..2b5caf9fe6609909c36e0a4a126d15dc5a04ddae 100644 (file)
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -314,6 +314,13 @@
                                status = "disabled";
                        };
 
+                       nand@63fdb000 {
+                               compatible = "fsl,imx53-nand";
+                               reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>;
+                               interrupts = <8>;
+                               status = "disabled";
+                       };
+
                        ssi3: ssi@63fe8000 {
                                compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
                                reg = <0x63fe8000 0x4000>;

diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index fcd94f3b0f0e7cf4380a47e80d0425c71a00f02d..7b525c1230d9e06a75e89ad32f0272478dacd24a 100644 (file)
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -357,6 +357,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
        clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi");
        clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi");
        clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi");
+       clk_register_clkdev(clk[nfc_gate], NULL, "83fdb000.nand");
 
        /* set the usboh3 parent to pll2_sw */
        clk_set_parent(clk[usboh3_sel], clk[pll2_sw]);
@@ -446,6 +447,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
        clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi");
        clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi");
        clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi");
+       clk_register_clkdev(clk[nfc_gate], NULL, "63fdb000.nand");
 
        /* set SDHC root clock to 200MHZ*/
        clk_set_rate(clk[esdhc_a_podf], 200000000);