drm/i915: Define IS_BROXTON properly.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 27 Oct 2015 17:14:54 +0000 (10:14 -0700)
committerJani Nikula <jani.nikula@intel.com>
Wed, 28 Oct 2015 19:34:22 +0000 (21:34 +0200)
Kabylake will also be defined as gen9 and !is_skylake.
So we need start by creating a proper Broxton
definition, otherwise we will break broxton with the
introduction of Kabylake.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445966099-1640-2-git-send-email-rodrigo.vivi@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h

index 121c5394fa5108efb697f156d542dbd20bfd01ff..64b3fa83e39eefb4fd9e1d77f7ef67e65d8fef11 100644 (file)
@@ -383,6 +383,7 @@ static const struct intel_device_info intel_skylake_gt3_info = {
 
 static const struct intel_device_info intel_broxton_info = {
        .is_preliminary = 1,
+       .is_broxton = 1,
        .gen = 9,
        .need_gfx_hws = 1, .has_hotplug = 1,
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
index 8873955d90ec50c21b21356962b0dee757718203..1f8ae093975b9d89fe413ffc265e78f68c788316 100644 (file)
@@ -765,6 +765,7 @@ struct intel_csr {
        func(is_valleyview) sep \
        func(is_haswell) sep \
        func(is_skylake) sep \
+       func(is_broxton) sep \
        func(is_preliminary) sep \
        func(has_fbc) sep \
        func(has_pipe_cxsr) sep \
@@ -2476,7 +2477,7 @@ struct drm_i915_cmd_table {
 #define IS_HASWELL(dev)        (INTEL_INFO(dev)->is_haswell)
 #define IS_BROADWELL(dev)      (!INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev))
 #define IS_SKYLAKE(dev)        (INTEL_INFO(dev)->is_skylake)
-#define IS_BROXTON(dev)        (!INTEL_INFO(dev)->is_skylake && IS_GEN9(dev))
+#define IS_BROXTON(dev)                (INTEL_INFO(dev)->is_broxton)
 #define IS_MOBILE(dev)         (INTEL_INFO(dev)->is_mobile)
 #define IS_HSW_EARLY_SDV(dev)  (IS_HASWELL(dev) && \
                                 (INTEL_DEVID(dev) & 0xFF00) == 0x0C00)