drm/nouveau/fifo/nv84: support user event trigger

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
index e34ab401fa52b0586a4663766e8d67f278d17745..f877bd524a922a81389a9e646a86441cb52b47c5 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
@@ -28,6 +28,7 @@
 #include <core/namedb.h>
 #include <core/handle.h>
 #include <core/ramht.h>
+#include <core/event.h>
 
 #include <subdev/instmem.h>
 #include <subdev/instmem/nv04.h>
@@ -536,6 +537,12 @@ nv04_fifo_intr(struct nouveau_subdev *subdev)
                                status &= ~0x00000010;
                                nv_wr32(priv, 0x002100, 0x00000010);
                        }
+
+                       if (status & 0x40000000) {
+                               nouveau_event_trigger(priv->base.uevent, 0);
+                               nv_wr32(priv, 0x002100, 0x40000000);
+                               status &= ~0x40000000;
+                       }
                }
 
                if (status) {

diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c
index cfea451afdf27b88f32ab3171b84fcdb142a0e15..840af61727883ec2367b75a5f0cd2be3856dc32f 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c
@@ -481,7 +481,7 @@ nv50_fifo_init(struct nouveau_object *object)
        nv_wr32(priv, 0x002044, 0x01003fff);
 
        nv_wr32(priv, 0x002100, 0xffffffff);
-       nv_wr32(priv, 0x002140, 0xffffffff);
+       nv_wr32(priv, 0x002140, 0xbfffffff);
 
        for (i = 0; i < 128; i++)
                nv_wr32(priv, 0x002600 + (i * 4), 0x00000000);

diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
index 8ae745b0369bb3e93db03f249f2b9b0dd6960f5d..094000e87871c35f5467efb1d262832e97b57056 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
@@ -26,6 +26,7 @@
 #include <core/client.h>
 #include <core/engctx.h>
 #include <core/ramht.h>
+#include <core/event.h>
 #include <core/class.h>
 #include <core/math.h>
 
@@ -379,6 +380,20 @@ nv84_fifo_cclass = {
  * PFIFO engine
  ******************************************************************************/
 
+static void
+nv84_fifo_uevent_enable(struct nouveau_event *event, int index)
+{
+       struct nv84_fifo_priv *priv = event->priv;
+       nv_mask(priv, 0x002140, 0x40000000, 0x40000000);
+}
+
+static void
+nv84_fifo_uevent_disable(struct nouveau_event *event, int index)
+{
+       struct nv84_fifo_priv *priv = event->priv;
+       nv_mask(priv, 0x002140, 0x40000000, 0x00000000);
+}
+
 static int
 nv84_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
               struct nouveau_oclass *oclass, void *data, u32 size,
@@ -402,6 +417,10 @@ nv84_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        if (ret)
                return ret;
 
+       priv->base.uevent->enable = nv84_fifo_uevent_enable;
+       priv->base.uevent->disable = nv84_fifo_uevent_disable;
+       priv->base.uevent->priv = priv;
+
        nv_subdev(priv)->unit = 0x00000100;
        nv_subdev(priv)->intr = nv04_fifo_intr;
        nv_engine(priv)->cclass = &nv84_fifo_cclass;