drm/radeon: fix typo in finding PLL params
authorChristian König <christian.koenig@amd.com>
Tue, 13 May 2014 10:50:54 +0000 (12:50 +0200)
committerChristian König <christian.koenig@amd.com>
Tue, 20 May 2014 12:42:05 +0000 (14:42 +0200)
Otherwise the limit is raised to high.

Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: Ken Moffat <zarniwhoop@ntlworld.com>
drivers/gpu/drm/radeon/radeon_display.c

index 408b6ac53f0b808c525f86b99e90922716f5e6dc..f00dbbf4d806511a86b034a73c2d68adac971b99 100644 (file)
@@ -999,7 +999,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
 
        /* avoid high jitter with small fractional dividers */
        if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV && (fb_div % 10)) {
-               fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 60);
+               fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 50);
                if (fb_div < fb_div_min) {
                        unsigned tmp = DIV_ROUND_UP(fb_div_min, fb_div);
                        fb_div *= tmp;