pinctrl: mvebu: armada-xp: remove non-existing NAND pins
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tue, 9 Jun 2015 16:46:56 +0000 (18:46 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 3 Aug 2015 16:29:42 +0000 (09:29 -0700)
commit bc99357f3690c11817756adfee0ece811a3db2e7 upstream.

After updating to a more recent version of the Armada XP datasheet, we
realized that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
drivers/pinctrl/mvebu/pinctrl-armada-xp.c

index bfa0a2e5e0cb929d91f666537fe45a99199005d0..797b3d5e2e58d6c7e27b6c648b01592e19fd8fd0 100644 (file)
@@ -41,8 +41,8 @@ mpp20         20       gpio, ge0(rxd4), ge1(rxd2), lcd(d20), ptp(clk)
 mpp21         21       gpio, ge0(rxd5), ge1(rxd3), lcd(d21), mem(bat)
 mpp22         22       gpio, ge0(rxd6), ge1(rxctl), lcd(d22), sata0(prsnt)
 mpp23         23       gpio, ge0(rxd7), ge1(rxclk), lcd(d23), sata1(prsnt)
-mpp24         24       gpio, lcd(hsync), sata1(prsnt), nf(bootcs-re), tdm(rst)
-mpp25         25       gpio, lcd(vsync), sata0(prsnt), nf(bootcs-we), tdm(pclk)
+mpp24         24       gpio, lcd(hsync), sata1(prsnt), tdm(rst)
+mpp25         25       gpio, lcd(vsync), sata0(prsnt), tdm(pclk)
 mpp26         26       gpio, lcd(clk), tdm(fsync), vdd(cpu1-pd)
 mpp27         27       gpio, lcd(e), tdm(dtx), ptp(trig)
 mpp28         28       gpio, lcd(pwm), tdm(drx), ptp(evreq)
index ab5dc04b3e8a1fc961a1766461f06c67e002cb2f..c5a01aea52b8c07e2f398a7e67b4ed0f8489d852 100644 (file)
@@ -159,13 +159,11 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
        MPP_MODE(24,
                 MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
                 MPP_VAR_FUNCTION(0x1, "sata1", "prsnt",    V_MV78230_PLUS),
-                MPP_VAR_FUNCTION(0x2, "nf", "bootcs-re",   V_MV78230_PLUS),
                 MPP_VAR_FUNCTION(0x3, "tdm", "rst",        V_MV78230_PLUS),
                 MPP_VAR_FUNCTION(0x4, "lcd", "hsync",      V_MV78230_PLUS)),
        MPP_MODE(25,
                 MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
                 MPP_VAR_FUNCTION(0x1, "sata0", "prsnt",    V_MV78230_PLUS),
-                MPP_VAR_FUNCTION(0x2, "nf", "bootcs-we",   V_MV78230_PLUS),
                 MPP_VAR_FUNCTION(0x3, "tdm", "pclk",       V_MV78230_PLUS),
                 MPP_VAR_FUNCTION(0x4, "lcd", "vsync",      V_MV78230_PLUS)),
        MPP_MODE(26,