}
/*
- * musb_platform_enable - enable interrupts
+ * am35x_musb_enable - enable interrupts
*/
-void musb_platform_enable(struct musb *musb)
+static void am35x_musb_enable(struct musb *musb)
{
void __iomem *reg_base = musb->ctrl_base;
u32 epmask;
}
/*
- * musb_platform_disable - disable HDRC and flush interrupts
+ * am35x_musb_disable - disable HDRC and flush interrupts
*/
-void musb_platform_disable(struct musb *musb)
+static void am35x_musb_disable(struct musb *musb)
{
void __iomem *reg_base = musb->ctrl_base;
#define portstate(stmt)
#endif
-static void am35x_set_vbus(struct musb *musb, int is_on)
+static void am35x_musb_set_vbus(struct musb *musb, int is_on)
{
WARN_ON(is_on && is_peripheral_active(musb));
}
spin_unlock_irqrestore(&musb->lock, flags);
}
-void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
+static void am35x_musb_try_idle(struct musb *musb, unsigned long timeout)
{
static unsigned long last_timer;
mod_timer(&otg_workaround, timeout);
}
-static irqreturn_t am35x_interrupt(int irq, void *hci)
+static irqreturn_t am35x_musb_interrupt(int irq, void *hci)
{
struct musb *musb = hci;
void __iomem *reg_base = musb->ctrl_base;
return ret;
}
-int musb_platform_set_mode(struct musb *musb, u8 musb_mode)
+static int am35x_musb_set_mode(struct musb *musb, u8 musb_mode)
{
u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
return 0;
}
-int __init musb_platform_init(struct musb *musb, void *board_data)
+static int am35x_musb_init(struct musb *musb)
{
void __iomem *reg_base = musb->ctrl_base;
u32 rev, lvl_intr, sw_reset;
if (is_host_enabled(musb))
setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
- musb->board_set_vbus = am35x_set_vbus;
+ musb->board_set_vbus = am35x_musb_set_vbus;
/* Global reset */
sw_reset = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
msleep(5);
- musb->isr = am35x_interrupt;
+ musb->isr = am35x_musb_interrupt;
/* clear level interrupt */
lvl_intr = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
return status;
}
-int musb_platform_exit(struct musb *musb)
+static int am35x_musb_exit(struct musb *musb)
{
if (is_host_enabled(musb))
del_timer_sync(&otg_workaround);
memcpy(dst, &val, len);
}
}
+
+const struct musb_platform_ops musb_ops = {
+ .init = am35x_musb_init,
+ .exit = am35x_musb_exit,
+
+ .enable = am35x_musb_enable,
+ .disable = am35x_musb_disable,
+
+ .set_mode = am35x_musb_set_mode,
+ .try_idle = am35x_musb_try_idle,
+
+ .set_vbus = am35x_musb_set_vbus,
+};
DBG(4, "state is %s\n", otg_state_string(musb));
}
-void musb_platform_enable(struct musb *musb)
+static void bfin_musb_enable(struct musb *musb)
{
if (!is_otg_enabled(musb) && is_host_enabled(musb)) {
mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY);
}
}
-void musb_platform_disable(struct musb *musb)
+static void bfin_musb_disable(struct musb *musb)
{
}
-static void bfin_set_vbus(struct musb *musb, int is_on)
+static void bfin_musb_set_vbus(struct musb *musb, int is_on)
{
int value = musb->config->gpio_vrsel_active;
if (!is_on)
musb_readb(musb->mregs, MUSB_DEVCTL));
}
-static int bfin_set_power(struct otg_transceiver *x, unsigned mA)
+static int bfin_musb_set_power(struct otg_transceiver *x, unsigned mA)
{
return 0;
}
-void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
+static void bfin_musb_try_idle(struct musb *musb, unsigned long timeout)
{
if (!is_otg_enabled(musb) && is_host_enabled(musb))
mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY);
}
-int musb_platform_get_vbus_status(struct musb *musb)
+static int bfin_musb_get_vbus_status(struct musb *musb)
{
return 0;
}
-int musb_platform_set_mode(struct musb *musb, u8 musb_mode)
+static int bfin_musb_set_mode(struct musb *musb, u8 musb_mode)
{
return -EIO;
}
-int __init musb_platform_init(struct musb *musb)
+static void bfin_musb_reg_init(struct musb *musb)
{
-
- /*
- * Rev 1.0 BF549 EZ-KITs require PE7 to be high for both DEVICE
- * and OTG HOST modes, while rev 1.1 and greater require PE7 to
- * be low for DEVICE mode and high for HOST mode. We set it high
- * here because we are in host mode
- */
-
- if (gpio_request(musb->config->gpio_vrsel, "USB_VRSEL")) {
- printk(KERN_ERR "Failed ro request USB_VRSEL GPIO_%d \n",
- musb->config->gpio_vrsel);
- return -ENODEV;
- }
- gpio_direction_output(musb->config->gpio_vrsel, 0);
-
- usb_nop_xceiv_register();
- musb->xceiv = otg_get_transceiver();
- if (!musb->xceiv) {
- gpio_free(musb->config->gpio_vrsel);
- return -ENODEV;
- }
-
if (ANOMALY_05000346) {
bfin_write_USB_APHY_CALIB(ANOMALY_05000346_value);
SSYNC();
EP2_RX_ENA | EP3_RX_ENA | EP4_RX_ENA |
EP5_RX_ENA | EP6_RX_ENA | EP7_RX_ENA);
SSYNC();
+}
+
+static int bfin_musb_init(struct musb *musb)
+{
+
+ /*
+ * Rev 1.0 BF549 EZ-KITs require PE7 to be high for both DEVICE
+ * and OTG HOST modes, while rev 1.1 and greater require PE7 to
+ * be low for DEVICE mode and high for HOST mode. We set it high
+ * here because we are in host mode
+ */
+
+ if (gpio_request(musb->config->gpio_vrsel, "USB_VRSEL")) {
+ printk(KERN_ERR "Failed ro request USB_VRSEL GPIO_%d\n",
+ musb->config->gpio_vrsel);
+ return -ENODEV;
+ }
+ gpio_direction_output(musb->config->gpio_vrsel, 0);
+
+ usb_nop_xceiv_register();
+ musb->xceiv = otg_get_transceiver();
+ if (!musb->xceiv) {
+ gpio_free(musb->config->gpio_vrsel);
+ return -ENODEV;
+ }
+
+ bfin_musb_reg_init(musb);
if (is_host_enabled(musb)) {
- musb->board_set_vbus = bfin_set_vbus;
+ musb->board_set_vbus = bfin_musb_set_vbus;
setup_timer(&musb_conn_timer,
musb_conn_timer_handler, (unsigned long) musb);
}
if (is_peripheral_enabled(musb))
- musb->xceiv->set_power = bfin_set_power;
+ musb->xceiv->set_power = bfin_musb_set_power;
musb->isr = blackfin_interrupt;
return 0;
}
-int musb_platform_exit(struct musb *musb)
+#ifdef CONFIG_PM
+void musb_platform_save_context(struct musb *musb,
+ struct musb_context_registers *musb_context)
+{
+ if (is_host_active(musb))
+ /*
+ * During hibernate gpio_vrsel will change from high to low
+ * low which will generate wakeup event resume the system
+ * immediately. Set it to 0 before hibernate to avoid this
+ * wakeup event.
+ */
+ gpio_set_value(musb->config->gpio_vrsel, 0);
+}
+
+void musb_platform_restore_context(struct musb *musb,
+ struct musb_context_registers *musb_context)
+{
+ bfin_musb_reg_init(musb);
+}
+#endif
+
+static int bfin_musb_exit(struct musb *musb)
{
gpio_free(musb->config->gpio_vrsel);
usb_nop_xceiv_unregister();
return 0;
}
+
+const struct musb_platform_ops musb_ops = {
+ .init = bfin_musb_init,
+ .exit = bfin_musb_exit,
+
+ .enable = bfin_musb_enable,
+ .disable = bfin_musb_disable,
+
+ .set_mode = bfin_musb_set_mode,
+ .try_idle = bfin_musb_try_idle,
+
+ .vbus_status = bfin_musb_vbus_status,
+ .set_vbus = bfin_musb_set_vbus,
+};
*/
/**
- * musb_platform_enable - enable interrupts
+ * da8xx_musb_enable - enable interrupts
*/
-void musb_platform_enable(struct musb *musb)
+static void da8xx_musb_enable(struct musb *musb)
{
void __iomem *reg_base = musb->ctrl_base;
u32 mask;
}
/**
- * musb_platform_disable - disable HDRC and flush interrupts
+ * da8xx_musb_disable - disable HDRC and flush interrupts
*/
-void musb_platform_disable(struct musb *musb)
+static void da8xx_musb_disable(struct musb *musb)
{
void __iomem *reg_base = musb->ctrl_base;
#define portstate(stmt)
#endif
-static void da8xx_set_vbus(struct musb *musb, int is_on)
+static void da8xx_musb_set_vbus(struct musb *musb, int is_on)
{
WARN_ON(is_on && is_peripheral_active(musb));
}
spin_unlock_irqrestore(&musb->lock, flags);
}
-void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
+static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
{
static unsigned long last_timer;
mod_timer(&otg_workaround, timeout);
}
-static irqreturn_t da8xx_interrupt(int irq, void *hci)
+static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
{
struct musb *musb = hci;
void __iomem *reg_base = musb->ctrl_base;
return ret;
}
-int musb_platform_set_mode(struct musb *musb, u8 musb_mode)
+static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode)
{
u32 cfgchip2 = __raw_readl(CFGCHIP2);
return 0;
}
-int __init musb_platform_init(struct musb *musb, void *board_data)
+static int da8xx_musb_init(struct musb *musb)
{
void __iomem *reg_base = musb->ctrl_base;
u32 rev;
if (is_host_enabled(musb))
setup_timer(&otg_workaround, otg_timer, (unsigned long)musb);
- musb->board_set_vbus = da8xx_set_vbus;
+ musb->board_set_vbus = da8xx_musb_set_vbus;
/* Reset the controller */
musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
rev, __raw_readl(CFGCHIP2),
musb_readb(reg_base, DA8XX_USB_CTRL_REG));
- musb->isr = da8xx_interrupt;
+ musb->isr = da8xx_musb_interrupt;
return 0;
fail:
clk_disable(musb->clock);
return -ENODEV;
}
-int musb_platform_exit(struct musb *musb)
+static int da8xx_musb_exit(struct musb *musb)
{
if (is_host_enabled(musb))
del_timer_sync(&otg_workaround);
return 0;
}
+
+const struct musb_platform_ops musb_ops = {
+ .init = da8xx_musb_init,
+ .exit = da8xx_musb_exit,
+
+ .enable = da8xx_musb_enable,
+ .disable = da8xx_musb_disable,
+
+ .set_mode = da8xx_musb_set_mode,
+ .try_idle = da8xx_musb_try_idle,
+
+ .set_vbus = da8xx_musb_set_vbus,
+};
static int dma_off = 1;
-void musb_platform_enable(struct musb *musb)
+static void davinci_musb_enable(struct musb *musb)
{
u32 tmp, old, val;
/*
* Disable the HDRC and flush interrupts
*/
-void musb_platform_disable(struct musb *musb)
+static void davinci_musb_disable(struct musb *musb)
{
/* because we don't set CTRLR.UINT, "important" to:
* - not read/write INTRUSB/INTRUSBE
#endif /* EVM */
-static void davinci_source_power(struct musb *musb, int is_on, int immediate)
+static void davinci_musb_source_power(struct musb *musb, int is_on, int immediate)
{
#ifdef CONFIG_MACH_DAVINCI_EVM
if (is_on)
#endif
}
-static void davinci_set_vbus(struct musb *musb, int is_on)
+static void davinci_musb_set_vbus(struct musb *musb, int is_on)
{
WARN_ON(is_on && is_peripheral_active(musb));
- davinci_source_power(musb, is_on, 0);
+ davinci_musb_source_power(musb, is_on, 0);
}
spin_unlock_irqrestore(&musb->lock, flags);
}
-static irqreturn_t davinci_interrupt(int irq, void *__hci)
+static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
{
unsigned long flags;
irqreturn_t retval = IRQ_NONE;
/* NOTE: this must complete poweron within 100 msec
* (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
*/
- davinci_source_power(musb, drvvbus, 0);
+ davinci_musb_source_power(musb, drvvbus, 0);
DBG(2, "VBUS %s (%s)%s, devctl %02x\n",
drvvbus ? "on" : "off",
otg_state_string(musb),
return retval;
}
-int musb_platform_set_mode(struct musb *musb, u8 mode)
+static int davinci_musb_set_mode(struct musb *musb, u8 mode)
{
/* EVM can't do this (right?) */
return -EIO;
}
-int __init musb_platform_init(struct musb *musb)
+static int davinci_musb_init(struct musb *musb)
{
void __iomem *tibase = musb->ctrl_base;
u32 revision;
if (is_host_enabled(musb))
setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
- musb->board_set_vbus = davinci_set_vbus;
- davinci_source_power(musb, 0, 1);
+ musb->board_set_vbus = davinci_musb_set_vbus;
+ davinci_musb_source_power(musb, 0, 1);
/* dm355 EVM swaps D+/D- for signal integrity, and
* is clocked from the main 24 MHz crystal.
revision, __raw_readl(USB_PHY_CTRL),
musb_readb(tibase, DAVINCI_USB_CTRL_REG));
- musb->isr = davinci_interrupt;
+ musb->isr = davinci_musb_interrupt;
return 0;
fail:
return -ENODEV;
}
-int musb_platform_exit(struct musb *musb)
+static int davinci_musb_exit(struct musb *musb)
{
if (is_host_enabled(musb))
del_timer_sync(&otg_workaround);
__raw_writel(deepsleep, DM355_DEEPSLEEP);
}
- davinci_source_power(musb, 0 /*off*/, 1);
+ davinci_musb_source_power(musb, 0 /*off*/, 1);
/* delay, to avoid problems with module reload */
if (is_host_enabled(musb) && musb->xceiv->default_a) {
return 0;
}
+
+const struct musb_platform_ops musb_ops = {
+ .init = davinci_musb_init,
+ .exit = davinci_musb_exit,
+
+ .enable = davinci_musb_enable,
+ .disable = davinci_musb_disable,
+
+ .set_mode = davinci_musb_set_mode,
+
+ .set_vbus = davinci_musb_set_vbus,
+};
case OTG_STATE_A_SUSPEND:
case OTG_STATE_A_WAIT_BCON:
DBG(1, "HNP: %s timeout\n", otg_state_string(musb));
- musb_set_vbus(musb, 0);
+ musb_platform_set_vbus(musb, 0);
musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
break;
default:
musb->ep0_stage = MUSB_EP0_START;
musb->xceiv->state = OTG_STATE_A_IDLE;
MUSB_HST_MODE(musb);
- musb_set_vbus(musb, 1);
+ musb_platform_set_vbus(musb, 1);
handled = IRQ_HANDLED;
}
/* go through A_WAIT_VFALL then start a new session */
if (!ignore)
- musb_set_vbus(musb, 0);
+ musb_platform_set_vbus(musb, 0);
handled = IRQ_HANDLED;
}
}
musb->controller = dev;
+ musb->ops = &musb_ops;
+
return musb;
}
void (*set_vbus)(struct musb *musb, int on);
};
+extern const struct musb_platform_ops musb_ops;
+
/*
* struct musb_hw_ep - endpoint hardware (bidirectional)
*
spinlock_t lock;
struct clk *clock;
struct clk *phy_clock;
+
+ const struct musb_platform_ops *ops;
+
irqreturn_t (*isr)(int, void *);
struct work_struct irq_work;
u16 hwvers;
#endif
};
-#ifdef CONFIG_PM
-struct musb_csr_regs {
- /* FIFO registers */
- u16 txmaxp, txcsr, rxmaxp, rxcsr;
- u16 rxfifoadd, txfifoadd;
- u8 txtype, txinterval, rxtype, rxinterval;
- u8 rxfifosz, txfifosz;
- u8 txfunaddr, txhubaddr, txhubport;
- u8 rxfunaddr, rxhubaddr, rxhubport;
-};
-
-struct musb_context_registers {
-
-#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
- defined(CONFIG_ARCH_OMAP4)
- u32 otg_sysconfig, otg_forcestandby;
-#endif
- u8 power;
- u16 intrtxe, intrrxe;
- u8 intrusbe;
- u16 frame;
- u8 index, testmode;
-
- u8 devctl, busctl, misc;
-
- struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
-};
-
-#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
- defined(CONFIG_ARCH_OMAP4)
-extern void musb_platform_save_context(struct musb *musb,
- struct musb_context_registers *musb_context);
-extern void musb_platform_restore_context(struct musb *musb,
- struct musb_context_registers *musb_context);
-#else
-#define musb_platform_save_context(m, x) do {} while (0)
-#define musb_platform_restore_context(m, x) do {} while (0)
-#endif
-
-#endif
-
-static inline void musb_set_vbus(struct musb *musb, int is_on)
-{
- musb->board_set_vbus(musb, is_on);
-}
-
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
static inline struct musb *gadget_to_musb(struct usb_gadget *g)
{
extern irqreturn_t musb_interrupt(struct musb *);
-extern void musb_platform_enable(struct musb *musb);
-extern void musb_platform_disable(struct musb *musb);
-
extern void musb_hnp_stop(struct musb *musb);
-extern int musb_platform_set_mode(struct musb *musb, u8 musb_mode);
+#ifdef CONFIG_PM
+struct musb_csr_regs {
+ /* FIFO registers */
+ u16 txmaxp, txcsr, rxmaxp, rxcsr;
+ u16 rxfifoadd, txfifoadd;
+ u8 txtype, txinterval, rxtype, rxinterval;
+ u8 rxfifosz, txfifosz;
+ u8 txfunaddr, txhubaddr, txhubport;
+ u8 rxfunaddr, rxhubaddr, rxhubport;
+};
-#if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN) || \
- defined(CONFIG_ARCH_DAVINCI_DA8XX) || \
- defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
- defined(CONFIG_ARCH_OMAP4)
-extern void musb_platform_try_idle(struct musb *musb, unsigned long timeout);
-#else
-#define musb_platform_try_idle(x, y) do {} while (0)
+struct musb_context_registers {
+
+#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
+ u32 otg_sysconfig, otg_forcestandby;
#endif
+ u8 power;
+ u16 intrtxe, intrrxe;
+ u8 intrusbe;
+ u16 frame;
+ u8 index, testmode;
-#if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN)
-extern int musb_platform_get_vbus_status(struct musb *musb);
+ u8 devctl, busctl, misc;
+
+ struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
+};
+
+#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_BLACKFIN)
+extern void musb_platform_save_context(struct musb *musb,
+ struct musb_context_registers *musb_context);
+extern void musb_platform_restore_context(struct musb *musb,
+ struct musb_context_registers *musb_context);
#else
-#define musb_platform_get_vbus_status(x) 0
+#define musb_platform_save_context(m, x) do {} while (0)
+#define musb_platform_restore_context(m, x) do {} while (0)
#endif
-extern int __init musb_platform_init(struct musb *musb);
-extern int musb_platform_exit(struct musb *musb);
+#endif
+
+static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
+{
+ if (musb->ops->set_vbus)
+ musb->ops->set_vbus(musb, is_on);
+}
+
+static inline void musb_platform_enable(struct musb *musb)
+{
+ if (musb->ops->enable)
+ musb->ops->enable(musb);
+}
+
+static inline void musb_platform_disable(struct musb *musb)
+{
+ if (musb->ops->disable)
+ musb->ops->disable(musb);
+}
+
+static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
+{
+ if (!musb->ops->set_mode)
+ return 0;
+
+ return musb->ops->set_mode(musb, mode);
+}
+
+static inline void musb_platform_try_idle(struct musb *musb,
+ unsigned long timeout)
+{
+ if (musb->ops->try_idle)
+ musb->ops->try_idle(musb, timeout);
+}
+
+static inline int musb_platform_get_vbus_status(struct musb *musb)
+{
+ if (!musb->ops->vbus_status)
+ return 0;
+
+ return musb->ops->vbus_status(musb);
+}
+
+static inline int musb_platform_init(struct musb *musb)
+{
+ if (!musb->ops->init)
+ return -EINVAL;
+
+ return musb->ops->init(musb);
+}
+
+static inline int musb_platform_exit(struct musb *musb)
+{
+ if (!musb->ops->exit)
+ return -EINVAL;
+
+ return musb->ops->exit(musb);
+}
+
+static inline int musb_platform_suspend(struct musb *musb)
+{
+ if (!musb->ops->suspend)
+ return 0;
+
+ return musb->ops->suspend(musb);
+}
+
+static inline int musb_platform_resume(struct musb *musb)
+{
+ if (!musb->ops->resume)
+ return 0;
+
+ return musb->ops->resume(musb);
+}
#endif /* __MUSB_CORE_H__ */
break;
case USB_PORT_FEAT_POWER:
if (!(is_otg_enabled(musb) && hcd->self.is_b_host))
- musb_set_vbus(musb, 0);
+ musb_platform_set_vbus(musb, 0);
break;
case USB_PORT_FEAT_C_CONNECTION:
case USB_PORT_FEAT_C_ENABLE:
#include "musb_core.h"
#include "omap2430.h"
-
static struct timer_list musb_idle_timer;
static void musb_do_idle(unsigned long _musb)
}
-void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
+static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
{
unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
static unsigned long last_timer;
mod_timer(&musb_idle_timer, timeout);
}
-void musb_platform_enable(struct musb *musb)
+static void omap2430_musb_enable(struct musb *musb)
{
}
-void musb_platform_disable(struct musb *musb)
+
+static void omap2430_musb_disable(struct musb *musb)
{
}
-static void omap_set_vbus(struct musb *musb, int is_on)
+
+static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
{
u8 devctl;
/* HDRC controls CPEN, but beware current surges during device
musb_readb(musb->mregs, MUSB_DEVCTL));
}
-static int musb_platform_resume(struct musb *musb);
+static int omap2430_musb_resume(struct musb *musb);
-int musb_platform_set_mode(struct musb *musb, u8 musb_mode)
+static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
{
u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
return 0;
}
-int __init musb_platform_init(struct musb *musb)
+static int omap2430_musb_init(struct musb *musb)
{
u32 l;
struct device *dev = musb->controller;
return -ENODEV;
}
- musb_platform_resume(musb);
+ omap2430_musb_resume(musb);
l = musb_readl(musb->mregs, OTG_SYSCONFIG);
l &= ~ENABLEWAKEUP; /* disable wakeup */
musb_readl(musb->mregs, OTG_SIMENABLE));
if (is_host_enabled(musb))
- musb->board_set_vbus = omap_set_vbus;
+ musb->board_set_vbus = omap2430_musb_set_vbus;
setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
}
#endif
-static int musb_platform_suspend(struct musb *musb)
+static int omap2430_musb_suspend(struct musb *musb)
{
u32 l;
return 0;
}
-static int musb_platform_resume(struct musb *musb)
+static int omap2430_musb_resume(struct musb *musb)
{
u32 l;
return 0;
}
-
-int musb_platform_exit(struct musb *musb)
+static int omap2430_musb_exit(struct musb *musb)
{
- musb_platform_suspend(musb);
+ omap2430_musb_suspend(musb);
otg_put_transceiver(musb->xceiv);
return 0;
}
+
+const struct musb_platform_ops musb_ops = {
+ .init = omap2430_musb_init,
+ .exit = omap2430_musb_exit,
+
+ .suspend = omap2430_musb_suspend,
+ .resume = omap2430_musb_resume,
+
+ .enable = omap2430_musb_enable,
+ .disable = omap2430_musb_disable,
+
+ .set_mode = omap2430_musb_set_mode,
+ .try_idle = omap2430_musb_try_idle,
+
+ .set_vbus = omap2430_musb_set_vbus,
+};
#include "musb_core.h"
-static void tusb_source_power(struct musb *musb, int is_on);
+static void tusb_musb_set_vbus(struct musb *musb, int is_on);
#define TUSB_REV_MAJOR(reg_val) ((reg_val >> 4) & 0xf)
#define TUSB_REV_MINOR(reg_val) (reg_val & 0xf)
return rev;
}
-static int __init tusb_print_revision(struct musb *musb)
+static int tusb_print_revision(struct musb *musb)
{
void __iomem *tbase = musb->ctrl_base;
u8 rev;
* USB link is not suspended ... and tells us the relevant wakeup
* events. SW_EN for voltage is handled separately.
*/
-void tusb_allow_idle(struct musb *musb, u32 wakeup_enables)
+static void tusb_allow_idle(struct musb *musb, u32 wakeup_enables)
{
void __iomem *tbase = musb->ctrl_base;
u32 reg;
/*
* Updates cable VBUS status. Caller must take care of locking.
*/
-int musb_platform_get_vbus_status(struct musb *musb)
+static int tusb_musb_vbus_status(struct musb *musb)
{
void __iomem *tbase = musb->ctrl_base;
u32 otg_stat, prcm_mngmt;
}
/* FALLTHROUGH */
case OTG_STATE_A_IDLE:
- tusb_source_power(musb, 0);
+ tusb_musb_set_vbus(musb, 0);
default:
break;
}
* we don't want to treat that full speed J as a wakeup event.
* ... peripherals must draw only suspend current after 10 msec.
*/
-void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
+static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout)
{
unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
static unsigned long last_timer;
| TUSB_DEV_OTG_TIMER_ENABLE) \
: 0)
-static void tusb_source_power(struct musb *musb, int is_on)
+static void tusb_musb_set_vbus(struct musb *musb, int is_on)
{
void __iomem *tbase = musb->ctrl_base;
u32 conf, prcm, timer;
* and peripheral modes in non-OTG configurations by reconfiguring hardware
* and then setting musb->board_mode. For now, only support OTG mode.
*/
-int musb_platform_set_mode(struct musb *musb, u8 musb_mode)
+static int tusb_musb_set_mode(struct musb *musb, u8 musb_mode)
{
void __iomem *tbase = musb->ctrl_base;
u32 otg_stat, phy_otg_ctrl, phy_otg_ena, dev_conf;
default_a = is_host_enabled(musb);
DBG(2, "Default-%c\n", default_a ? 'A' : 'B');
musb->xceiv->default_a = default_a;
- tusb_source_power(musb, default_a);
+ tusb_musb_set_vbus(musb, default_a);
/* Don't allow idling immediately */
if (default_a)
switch (musb->xceiv->state) {
case OTG_STATE_A_IDLE:
DBG(2, "Got SRP, turning on VBUS\n");
- musb_set_vbus(musb, 1);
+ musb_platform_set_vbus(musb, 1);
/* CONNECT can wake if a_wait_bcon is set */
if (musb->a_wait_bcon != 0)
*/
if (musb->vbuserr_retry) {
musb->vbuserr_retry--;
- tusb_source_power(musb, 1);
+ tusb_musb_set_vbus(musb, 1);
} else {
musb->vbuserr_retry
= VBUSERR_RETRY_COUNT;
- tusb_source_power(musb, 0);
+ tusb_musb_set_vbus(musb, 0);
}
break;
default:
} else {
/* REVISIT report overcurrent to hub? */
ERR("vbus too slow, devctl %02x\n", devctl);
- tusb_source_power(musb, 0);
+ tusb_musb_set_vbus(musb, 0);
}
break;
case OTG_STATE_A_WAIT_BCON:
return idle_timeout;
}
-static irqreturn_t tusb_interrupt(int irq, void *__hci)
+static irqreturn_t tusb_musb_interrupt(int irq, void *__hci)
{
struct musb *musb = __hci;
void __iomem *tbase = musb->ctrl_base;
musb_writel(tbase, TUSB_INT_SRC_CLEAR,
int_src & ~TUSB_INT_MASK_RESERVED_BITS);
- musb_platform_try_idle(musb, idle_timeout);
+ tusb_musb_try_idle(musb, idle_timeout);
musb_writel(tbase, TUSB_INT_MASK, int_mask);
spin_unlock_irqrestore(&musb->lock, flags);
* REVISIT:
* - Check what is unnecessary in MGC_HdrcStart()
*/
-void musb_platform_enable(struct musb *musb)
+static void tusb_musb_enable(struct musb *musb)
{
void __iomem *tbase = musb->ctrl_base;
/*
* Disables TUSB6010. Caller must take care of locking.
*/
-void musb_platform_disable(struct musb *musb)
+static void tusb_musb_disable(struct musb *musb)
{
void __iomem *tbase = musb->ctrl_base;
* Sets up TUSB6010 CPU interface specific signals and registers
* Note: Settings optimized for OMAP24xx
*/
-static void __init tusb_setup_cpu_interface(struct musb *musb)
+static void tusb_setup_cpu_interface(struct musb *musb)
{
void __iomem *tbase = musb->ctrl_base;
musb_writel(tbase, TUSB_WAIT_COUNT, 1);
}
-static int __init tusb_start(struct musb *musb)
+static int tusb_musb_start(struct musb *musb)
{
void __iomem *tbase = musb->ctrl_base;
int ret = 0;
return -ENODEV;
}
-int __init musb_platform_init(struct musb *musb)
+static int tusb_musb_init(struct musb *musb)
{
struct platform_device *pdev;
struct resource *mem;
*/
musb->mregs += TUSB_BASE_OFFSET;
- ret = tusb_start(musb);
+ ret = tusb_musb_start(musb);
if (ret) {
printk(KERN_ERR "Could not start tusb6010 (%d)\n",
ret);
goto done;
}
- musb->isr = tusb_interrupt;
+ musb->isr = tusb_musb_interrupt;
- if (is_host_enabled(musb))
- musb->board_set_vbus = tusb_source_power;
if (is_peripheral_enabled(musb)) {
musb->xceiv->set_power = tusb_draw_power;
the_musb = musb;
return ret;
}
-int musb_platform_exit(struct musb *musb)
+static int tusb_musb_exit(struct musb *musb)
{
del_timer_sync(&musb_idle_timer);
the_musb = NULL;
usb_nop_xceiv_unregister();
return 0;
}
+
+const struct musb_platform_ops musb_ops = {
+ .init = tusb_musb_init,
+ .exit = tusb_musb_exit,
+
+ .enable = tusb_musb_enable,
+ .disable = tusb_musb_disable,
+
+ .set_mode = tusb_musb_set_mode,
+ .try_idle = tusb_musb_try_idle,
+
+ .vbus_status = tusb_musb_vbus_status,
+ .set_vbus = tusb_musb_set_vbus,
+};
projects / GitHub / LineageOS / android_kernel_motorola_exynos9610.git / commitdiff