iio: aspeed-adc: wait for initial sequence.
authorMykola Kostenok <c_mykolak@mellanox.com>
Mon, 17 Jul 2017 09:00:35 +0000 (12:00 +0300)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 23 Jul 2017 11:02:40 +0000 (12:02 +0100)
This patch enables adc engine at initialization time and waits
for the initial sequence completion before enabling adc channels.

Without this code adc channels are not functional and shows
zeros for all connected channels.

Tested on mellanox msn platform.

v1 -> v2:
Pointed by Rick Altherr:
 - Wait init sequence code enabled by bool
from OF match table.

Signed-off-by: Mykola Kostenok <c_mykolak@mellanox.com>
Reviewed-by: Rick Altherr <raltherr@google.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
drivers/iio/adc/aspeed_adc.c

index 62670cbfa2bbeb19961bd01ff5f82bf97be34513..87fd6e0ce5ee000e871934b1ebeeb8221dd20039 100644 (file)
@@ -22,6 +22,7 @@
 
 #include <linux/iio/iio.h>
 #include <linux/iio/driver.h>
+#include <linux/iopoll.h>
 
 #define ASPEED_RESOLUTION_BITS         10
 #define ASPEED_CLOCKS_PER_SAMPLE       12
 
 #define ASPEED_ENGINE_ENABLE           BIT(0)
 
+#define ASPEED_ADC_CTRL_INIT_RDY       BIT(8)
+
+#define ASPEED_ADC_INIT_POLLING_TIME   500
+#define ASPEED_ADC_INIT_TIMEOUT                500000
+
 struct aspeed_adc_model_data {
        const char *model_name;
        unsigned int min_sampling_rate; // Hz
        unsigned int max_sampling_rate; // Hz
        unsigned int vref_voltage;      // mV
+       bool wait_init_sequence;
 };
 
 struct aspeed_adc_data {
@@ -211,6 +218,24 @@ static int aspeed_adc_probe(struct platform_device *pdev)
                goto scaler_error;
        }
 
+       model_data = of_device_get_match_data(&pdev->dev);
+
+       if (model_data->wait_init_sequence) {
+               /* Enable engine in normal mode. */
+               writel(ASPEED_OPERATION_MODE_NORMAL | ASPEED_ENGINE_ENABLE,
+                      data->base + ASPEED_REG_ENGINE_CONTROL);
+
+               /* Wait for initial sequence complete. */
+               ret = readl_poll_timeout(data->base + ASPEED_REG_ENGINE_CONTROL,
+                                        adc_engine_control_reg_val,
+                                        adc_engine_control_reg_val &
+                                        ASPEED_ADC_CTRL_INIT_RDY,
+                                        ASPEED_ADC_INIT_POLLING_TIME,
+                                        ASPEED_ADC_INIT_TIMEOUT);
+               if (ret)
+                       goto scaler_error;
+       }
+
        /* Start all channels in normal mode. */
        clk_prepare_enable(data->clk_scaler->clk);
        adc_engine_control_reg_val = GENMASK(31, 16) |
@@ -270,6 +295,7 @@ static const struct aspeed_adc_model_data ast2500_model_data = {
        .vref_voltage = 1800, // mV
        .min_sampling_rate = 1,
        .max_sampling_rate = 1000000,
+       .wait_init_sequence = true,
 };
 
 static const struct of_device_id aspeed_adc_matches[] = {