drm/nouveau/mc/g84: define reset masks + intr cleanup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
index c481053785faf2f4bd8aa5b8304d0718ac21f0b1..97abccb66fea726eaa3603ba843c156abe714b82 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
@@ -16,6 +16,7 @@ void nvkm_mc_unk260(struct nvkm_mc *, u32 data);
 int nv04_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int nv44_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int nv50_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
+int g84_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int g98_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int gt215_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int gf100_mc_new(struct nvkm_device *, int, struct nvkm_mc **);

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 0696dcb4dffdbb0879a2188cd877db34e4eaa82b..3fd32076838bce0ae7c55bc3a3fb48f6141cabcb 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -926,7 +926,7 @@ nv84_chipset = {
        .gpio = nv50_gpio_new,
        .i2c = nv50_i2c_new,
        .imem = nv50_instmem_new,
-       .mc = nv50_mc_new,
+       .mc = g84_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = g84_pci_new,
@@ -958,7 +958,7 @@ nv86_chipset = {
        .gpio = nv50_gpio_new,
        .i2c = nv50_i2c_new,
        .imem = nv50_instmem_new,
-       .mc = nv50_mc_new,
+       .mc = g84_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = g84_pci_new,
@@ -990,7 +990,7 @@ nv92_chipset = {
        .gpio = nv50_gpio_new,
        .i2c = nv50_i2c_new,
        .imem = nv50_instmem_new,
-       .mc = nv50_mc_new,
+       .mc = g84_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = g84_pci_new,
@@ -1022,7 +1022,7 @@ nv94_chipset = {
        .gpio = g94_gpio_new,
        .i2c = g94_i2c_new,
        .imem = nv50_instmem_new,
-       .mc = nv50_mc_new,
+       .mc = g84_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = g94_pci_new,
@@ -1054,7 +1054,7 @@ nv96_chipset = {
        .gpio = g94_gpio_new,
        .i2c = g94_i2c_new,
        .imem = nv50_instmem_new,
-       .mc = nv50_mc_new,
+       .mc = g84_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = g94_pci_new,
@@ -1118,7 +1118,7 @@ nva0_chipset = {
        .gpio = g94_gpio_new,
        .i2c = nv50_i2c_new,
        .imem = nv50_instmem_new,
-       .mc = g98_mc_new,
+       .mc = g84_mc_new,
        .mmu = nv50_mmu_new,
        .mxm = nv50_mxm_new,
        .pci = g94_pci_new,

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild
index 10772ea790eda0d8511db8207a51d907651ede2f..271d573044b4a7571aca3145e2b952e9899c5677 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild
@@ -2,6 +2,7 @@ nvkm-y += nvkm/subdev/mc/base.o
 nvkm-y += nvkm/subdev/mc/nv04.o
 nvkm-y += nvkm/subdev/mc/nv44.o
 nvkm-y += nvkm/subdev/mc/nv50.o
+nvkm-y += nvkm/subdev/mc/g84.o
 nvkm-y += nvkm/subdev/mc/g98.o
 nvkm-y += nvkm/subdev/mc/gt215.o
 nvkm-y += nvkm/subdev/mc/gf100.o

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c
new file mode 100644 (file)
index 0000000..5c85b47
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c
@@ -0,0 +1,68 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "priv.h"
+
+static const struct nvkm_mc_map
+g84_mc_reset[] = {
+       { 0x04008000, NVKM_ENGINE_BSP },
+       { 0x02004000, NVKM_ENGINE_CIPHER },
+       { 0x01020000, NVKM_ENGINE_VP },
+       { 0x00400002, NVKM_ENGINE_MPEG },
+       { 0x00201000, NVKM_ENGINE_GR },
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       {}
+};
+
+const struct nvkm_mc_map
+g84_mc_intr[] = {
+       { 0x04000000, NVKM_ENGINE_DISP },
+       { 0x00020000, NVKM_ENGINE_VP },
+       { 0x00008000, NVKM_ENGINE_BSP },
+       { 0x00004000, NVKM_ENGINE_CIPHER },
+       { 0x00001000, NVKM_ENGINE_GR },
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       { 0x00000001, NVKM_ENGINE_MPEG },
+       { 0x0002d101, NVKM_SUBDEV_FB },
+       { 0x10000000, NVKM_SUBDEV_BUS },
+       { 0x00200000, NVKM_SUBDEV_GPIO },
+       { 0x00200000, NVKM_SUBDEV_I2C },
+       { 0x00100000, NVKM_SUBDEV_TIMER },
+       {},
+};
+
+static const struct nvkm_mc_func
+g84_mc = {
+       .init = nv50_mc_init,
+       .intr = g84_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
+       .reset = g84_mc_reset,
+};
+
+int
+g84_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
+{
+       return nvkm_mc_new_(&g84_mc, device, index, pmc);
+}