ARM: imx6q: resume PL310 only when CACHE_L2X0 defined
authorEric Miao <eric.miao@linaro.org>
Thu, 22 Dec 2011 03:55:01 +0000 (11:55 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Mon, 26 Dec 2011 02:18:59 +0000 (10:18 +0800)
Original patch from Lothar Waßmann, this patch fixes a building error
when CONFIG_CACHE_L2X0 is not defined.

Cc: Lothar Waßmann <lw@karo-electronics.de>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/mach-imx/head-v7.S
arch/arm/mach-imx/pm-imx6q.c

index a59cae747af40706d7eb038f812f22a592b2eb35..cec23a857c7ead76573283bc2eb141120b87f3d8 100644 (file)
@@ -80,6 +80,7 @@ ENDPROC(v7_secondary_startup)
        .data
        .align
 
+#ifdef CONFIG_CACHE_L2X0
        .macro  pl310_resume
        ldr     r2, phys_l2x0_saved_regs
        ldr     r0, [r2, #L2X0_R_PHY_BASE]      @ get physical base of l2x0
@@ -89,13 +90,17 @@ ENDPROC(v7_secondary_startup)
        str     r1, [r0, #L2X0_CTRL]            @ re-enable L2
        .endm
 
+       .globl  phys_l2x0_saved_regs
+phys_l2x0_saved_regs:
+        .long   0
+#else
+       .macro  pl310_resume
+       .endm
+#endif
+
 ENTRY(v7_cpu_resume)
        bl      v7_invalidate_l1
        pl310_resume
        b       cpu_resume
 ENDPROC(v7_cpu_resume)
-
-       .globl  phys_l2x0_saved_regs
-phys_l2x0_saved_regs:
-        .long   0
 #endif
index f20f191d7cca44142c67ed0ad7d4c755cce99157..f7b0c2b1b90529849050dc45243b75f4bb4d0e68 100644 (file)
@@ -64,7 +64,9 @@ void __init imx6q_pm_init(void)
         * address of the data structure used by l2x0 core to save registers,
         * and later restore the necessary ones in imx6q resume entry.
         */
+#ifdef CONFIG_CACHE_L2X0
        phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
+#endif
 
        suspend_set_ops(&imx6q_pm_ops);
 }