ath9k_hw: move clock definitions from hw.c to hw.h
authorLuis R. Rodriguez <lrodriguez@atheros.com>
Sat, 12 Jun 2010 04:33:39 +0000 (00:33 -0400)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 14 Jun 2010 19:39:29 +0000 (15:39 -0400)
These will be used by the ANI code next.

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/hw.c
drivers/net/wireless/ath/ath9k/hw.h

index 2adc7e78cebfe38d3ba7ba7a09248a0a1d792460..5f46861fd100b1c8d2ca4b620063700c2cbc8bda 100644 (file)
 #include "rc.h"
 #include "ar9003_mac.h"
 
-#define ATH9K_CLOCK_RATE_CCK           22
-#define ATH9K_CLOCK_RATE_5GHZ_OFDM     40
-#define ATH9K_CLOCK_RATE_2GHZ_OFDM     44
-#define ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM 44
-
 static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type);
 
 MODULE_AUTHOR("Atheros Communications");
index 88bf2fca3736483d494294673d7ba42668e0db94..3a28cdc19484e5ec6dddfc28fe0835cee780424f 100644 (file)
@@ -938,4 +938,9 @@ void ar9003_hw_attach_ops(struct ath_hw *ah);
 #define ATH_PCIE_CAP_LINK_L0S  1
 #define ATH_PCIE_CAP_LINK_L1   2
 
+#define ATH9K_CLOCK_RATE_CCK           22
+#define ATH9K_CLOCK_RATE_5GHZ_OFDM     40
+#define ATH9K_CLOCK_RATE_2GHZ_OFDM     44
+#define ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM 44
+
 #endif