net: phy: Add Meson GXL Internal PHY driver

Add driver for the Internal RMII PHY found in the Amlogic Meson GXL SoCs.

This PHY seems to only implement some standard registers and need some
workarounds to provide autoneg values from vendor registers.

Some magic values are currently used to configure the PHY, and this a
temporary setup until clarification about these registers names and
registers fields are provided by Amlogic.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index d3fcfd29191339c60fc624620bc0a28f6f7df10d..d361835b315dd6b9ed542a48515e85c8024192d3 100644 (file)
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -277,6 +277,11 @@ config MARVELL_PHY
        ---help---
          Currently has a driver for the 88E1011S
 
+config MESON_GXL_PHY
+       tristate "Amlogic Meson GXL Internal PHY"
+       ---help---
+         Currently has a driver for the Amlogic Meson GXL Internal PHY
+
 config MICREL_PHY
        tristate "Micrel PHYs"
        ---help---

diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 86d12cd3fbf0912297f64674d5c1309e6339a78c..356859ac7c18be8e41da7b40aad9a71832a8a1e9 100644 (file)
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_INTEL_XWAY_PHY)  += intel-xway.o
 obj-$(CONFIG_LSI_ET1011C_PHY)  += et1011c.o
 obj-$(CONFIG_LXT_PHY)          += lxt.o
 obj-$(CONFIG_MARVELL_PHY)      += marvell.o
+obj-$(CONFIG_MESON_GXL_PHY)    += meson-gxl.o
 obj-$(CONFIG_MICREL_KS8995MA)  += spi_ks8995.o
 obj-$(CONFIG_MICREL_PHY)       += micrel.o
 obj-$(CONFIG_MICROCHIP_PHY)    += microchip.o

diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c
new file mode 100644 (file)
index 0000000..1ea69b7
--- /dev/null
+++ b/drivers/net/phy/meson-gxl.c
@@ -0,0 +1,81 @@
+/*
+ * Amlogic Meson GXL Internal PHY Driver
+ *
+ * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
+ * Copyright (C) 2016 BayLibre, SAS. All rights reserved.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <linux/netdevice.h>
+
+static int meson_gxl_config_init(struct phy_device *phydev)
+{
+       /* Enable Analog and DSP register Bank access by */
+       phy_write(phydev, 0x14, 0x0000);
+       phy_write(phydev, 0x14, 0x0400);
+       phy_write(phydev, 0x14, 0x0000);
+       phy_write(phydev, 0x14, 0x0400);
+
+       /* Write Analog register 23 */
+       phy_write(phydev, 0x17, 0x8E0D);
+       phy_write(phydev, 0x14, 0x4417);
+
+       /* Enable fractional PLL */
+       phy_write(phydev, 0x17, 0x0005);
+       phy_write(phydev, 0x14, 0x5C1B);
+
+       /* Program fraction FR_PLL_DIV1 */
+       phy_write(phydev, 0x17, 0x029A);
+       phy_write(phydev, 0x14, 0x5C1D);
+
+       /* Program fraction FR_PLL_DIV1 */
+       phy_write(phydev, 0x17, 0xAAAA);
+       phy_write(phydev, 0x14, 0x5C1C);
+
+       return 0;
+}
+
+static struct phy_driver meson_gxl_phy[] = {
+       {
+               .phy_id         = 0x01814400,
+               .phy_id_mask    = 0xfffffff0,
+               .name           = "Meson GXL Internal PHY",
+               .features       = PHY_BASIC_FEATURES,
+               .flags          = PHY_IS_INTERNAL,
+               .config_init    = meson_gxl_config_init,
+               .config_aneg    = genphy_config_aneg,
+               .aneg_done      = genphy_aneg_done,
+               .read_status    = genphy_read_status,
+               .suspend        = genphy_suspend,
+               .resume         = genphy_resume,
+       },
+};
+
+static struct mdio_device_id __maybe_unused meson_gxl_tbl[] = {
+       { 0x01814400, 0xfffffff0 },
+       { }
+};
+
+module_phy_driver(meson_gxl_phy);
+
+MODULE_DEVICE_TABLE(mdio, meson_gxl_tbl);
+
+MODULE_DESCRIPTION("Amlogic Meson GXL Internal PHY driver");
+MODULE_AUTHOR("Baoqi wang");
+MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
+MODULE_LICENSE("GPL");