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mmc: dw_mmc: change the DW_MCI_FREQ_MIN from 400K to 100K
authorJaehoon Chung <jh80.chung@samsung.com>
Thu, 17 Nov 2016 07:40:35 +0000 (16:40 +0900)
committerUlf Hansson <ulf.hansson@linaro.org>
Tue, 29 Nov 2016 08:05:07 +0000 (09:05 +0100)
If there is no property "clock-freq-min-max", mmc->f_min should be set
to 400K by default. But Some SoC can be used 100K.
When 100K is used, MMC core will try to check from 400K to 100K.

Reported-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/dw_mmc.c patch | blob | blame | history

diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 441ca447c4ba5832c5d69f4666e7ec8d491d9388..7c7cbb763deb508ac1b6c5b04338a4af85a8a350 100644 (file)
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -54,7 +54,7 @@
 #define DW_MCI_DMA_THRESHOLD   16
 
 #define DW_MCI_FREQ_MAX        200000000       /* unit: HZ */
-#define DW_MCI_FREQ_MIN        400000          /* unit: HZ */
+#define DW_MCI_FREQ_MIN        100000          /* unit: HZ */
 
 #define IDMAC_INT_CLR          (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \
                                 SDMMC_IDMAC_INT_CES | SDMMC_IDMAC_INT_DU | \