arm64/debug: Move BRK ESR template macro into <asm/esr.h>
authorDave P Martin <Dave.Martin@arm.com>
Fri, 24 Jul 2015 15:37:45 +0000 (16:37 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 27 Jul 2015 10:08:42 +0000 (11:08 +0100)
It makes sense to keep all the architectural exception syndrome
definitions in the same place.

Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/debug-monitors.h
arch/arm64/include/asm/esr.h

index bb97e9d88d23ad99d6a0c66fa7e4de8cf96d877e..e28b1ddf22b9305a7ef1774c3c1c3bb75242a243 100644 (file)
  */
 #define BREAK_INSTR_SIZE               AARCH64_INSN_SIZE
 
-/*
- * ESR values expected for dynamic and compile time BRK instruction
- */
-#define ESR_ELx_VAL_BRK64(imm)                                 \
-       ((ESR_ELx_EC_BRK64 << ESR_ELx_EC_SHIFT) | ESR_ELx_IL |  \
-        ((imm) & 0xffff))
-
 /*
  * #imm16 values used for BRK instruction generation
  * Allowed values for kgbd are 0x400 - 0x7ff
index 70522450ca2342a66b3ec27167bb94e08590f6d1..1b44cf6be4b57324c63b71f7a7afa073c362b8e5 100644 (file)
 #define ESR_ELx_WFx_ISS_WFE    (UL(1) << 0)
 #define ESR_ELx_xVC_IMM_MASK   ((1UL << 16) - 1)
 
+/* ESR value templates for specific events */
+
+/* BRK instruction trap from AArch64 state */
+#define ESR_ELx_VAL_BRK64(imm)                                 \
+       ((ESR_ELx_EC_BRK64 << ESR_ELx_EC_SHIFT) | ESR_ELx_IL |  \
+        ((imm) & 0xffff))
+
 #ifndef __ASSEMBLY__
 #include <asm/types.h>