drm/radeon: add a GPU reset counter queryable by userspace
authorMarek Olšák <marek.olsak@amd.com>
Wed, 29 Apr 2015 17:40:33 +0000 (19:40 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 May 2015 14:31:19 +0000 (10:31 -0400)
Userspace will be able to tell whether a GPU reset occured by comparing
an old referece value of the counter with a new value.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_device.c
drivers/gpu/drm/radeon/radeon_drv.c
drivers/gpu/drm/radeon/radeon_kms.c
include/uapi/drm/radeon_drm.h

index 46eb0fa75a614307286446a99d7c1c2037973ab4..352870cbb8b8c3bd5ac860dac8bc7a418ff51951 100644 (file)
@@ -2435,6 +2435,7 @@ struct radeon_device {
        atomic64_t                      vram_usage;
        atomic64_t                      gtt_usage;
        atomic64_t                      num_bytes_moved;
+       atomic_t                        gpu_reset_counter;
        /* ACPI interface */
        struct radeon_atif              atif;
        struct radeon_atcs              atcs;
index b7ca4c51462120fab3ab146dd74f653e8bcb91cb..13e207e0dff04168c63b2c0e8acd3895e51938ce 100644 (file)
@@ -1725,6 +1725,8 @@ int radeon_gpu_reset(struct radeon_device *rdev)
                return 0;
        }
 
+       atomic_inc(&rdev->gpu_reset_counter);
+
        radeon_save_bios_scratch_regs(rdev);
        /* block TTM */
        resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev);
index 7d620d4b3f314d77407fbdbbf72c01435f1e4196..5751446677d382428846b14fc6d37d908bb582b9 100644 (file)
  *            CS to GPU on >= r600
  *   2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
  *   2.42.0 - Add VCE/VUI (Video Usability Information) support
+ *   2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
  */
 #define KMS_DRIVER_MAJOR       2
-#define KMS_DRIVER_MINOR       42
+#define KMS_DRIVER_MINOR       43
 #define KMS_DRIVER_PATCHLEVEL  0
 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 int radeon_driver_unload_kms(struct drm_device *dev);
index 7b2a7335cc5d557eafa6864d50cb6ebc9cdfb5ff..9632e886ddc3a85a79bdb300c02db326ebd57d1e 100644 (file)
@@ -576,6 +576,9 @@ static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                if (radeon_get_allowed_info_register(rdev, *value, value))
                        return -EINVAL;
                break;
+       case RADEON_INFO_GPU_RESET_COUNTER:
+               *value = atomic_read(&rdev->gpu_reset_counter);
+               break;
        default:
                DRM_DEBUG_KMS("Invalid request %d\n", info->request);
                return -EINVAL;
index 871e73f99a4d7aa13b4cd6f5bc8969421c2a9301..573cb86a3d6e8b0ef7fee5dfb2003b9e2f50ef71 100644 (file)
@@ -1038,6 +1038,7 @@ struct drm_radeon_cs {
 #define RADEON_INFO_CURRENT_GPU_SCLK   0x22
 #define RADEON_INFO_CURRENT_GPU_MCLK   0x23
 #define RADEON_INFO_READ_REG           0x24
+#define RADEON_INFO_GPU_RESET_COUNTER  0x25
 
 struct drm_radeon_info {
        uint32_t                request;