the current codes send 1 bytes, then after getting TX done interrupt,
send subsequent bytes. it causes redundant interrupts.
for example, if we have 3 bytes in TX buffer, the TX flow is:
1. send 1 byte
2. get TX down interrupt
3. send the left 2 bytes
4. get TX down interrupt
this patch moves to send more bytes and decrease interrupts, the new
flow is:
1. send 3 bytes
2. get TX down interrupt
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
if (sirfport->tx_dma_chan)
sirfsoc_uart_tx_with_dma(sirfport);
else {
- sirfsoc_uart_pio_tx_chars(sirfport, 1);
+ sirfsoc_uart_pio_tx_chars(sirfport,
+ SIRFSOC_UART_IO_TX_REASONABLE_CNT);
wr_regl(port, ureg->sirfsoc_tx_fifo_op, SIRFUART_FIFO_START);
if (!sirfport->is_marco)
wr_regl(port, ureg->sirfsoc_int_en_reg,
/* I/O Mode */
#define SIRFSOC_UART_IO_RX_MAX_CNT 256
-#define SIRFSOC_UART_IO_TX_REASONABLE_CNT 6
+#define SIRFSOC_UART_IO_TX_REASONABLE_CNT 256