Merge branch 'next-s5p' into for-next-new
authorKukjin Kim <kgene.kim@samsung.com>
Thu, 30 Dec 2010 01:44:13 +0000 (10:44 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Thu, 30 Dec 2010 01:44:13 +0000 (10:44 +0900)
1  2 
arch/arm/mach-s5p64x0/include/mach/map.h
arch/arm/mach-s5pv210/clock.c
arch/arm/mach-s5pv210/mach-smdkv210.c
arch/arm/mach-s5pv310/include/mach/irqs.h
arch/arm/mach-s5pv310/include/mach/map.h
arch/arm/mach-s5pv310/mach-smdkc210.c
arch/arm/mach-s5pv310/mach-smdkv310.c
arch/arm/plat-samsung/include/plat/devs.h

Simple merge
index 82e635625073f685976c9bb7b11198c1fdeee784,30eec118a3a44c267b6ed09ba1b890330229050e..3a59068e983a39cff0f848099b1f290bbffab577
@@@ -119,11 -156,28 +156,29 @@@ static struct platform_device *smdkv210
        &s3c_device_rtc,
        &s3c_device_ts,
        &s3c_device_wdt,
+       &smdkv210_dm9000,
  };
  
+ static void __init smdkv210_dm9000_init(void)
+ {
+       unsigned int tmp;
+       gpio_request(S5PV210_MP01(5), "nCS5");
+       s3c_gpio_cfgpin(S5PV210_MP01(5), S3C_GPIO_SFN(2));
+       gpio_free(S5PV210_MP01(5));
+       tmp = (5 << S5P_SROM_BCX__TACC__SHIFT);
+       __raw_writel(tmp, S5P_SROM_BC5);
+       tmp = __raw_readl(S5P_SROM_BW);
+       tmp &= (S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS5__SHIFT);
+       tmp |= (1 << S5P_SROM_BW__NCS5__SHIFT);
+       __raw_writel(tmp, S5P_SROM_BW);
+ }
  static struct i2c_board_info smdkv210_i2c_devs0[] __initdata = {
        { I2C_BOARD_INFO("24c08", 0x50), },     /* Samsung S524AD0XD1 */
 +      { I2C_BOARD_INFO("wm8580", 0x1b), },
  };
  
  static struct i2c_board_info smdkv210_i2c_devs1[] __initdata = {
index 53994467605dab987fb4675717f5b5d59d893c26,5eab2ecfed2a4d580dda970b550f37e0b4f1d511..0d0e7eb5b391ddbcbabaaeb7fcb0291e39466566
  #define S5PV310_PA_HSMMC(x)           (0x12510000 + ((x) * 0x10000))
  
  #define S5PV310_PA_SROMC              (0x12570000)
+ #define S5P_PA_SROMC                  S5PV310_PA_SROMC
  
 +/* S/PDIF */
 +#define S5PV310_PA_SPDIF      0xE1100000
 +
 +/* I2S */
 +#define S5PV310_PA_I2S0               0x03830000
 +#define S5PV310_PA_I2S1               0xE3100000
 +#define S5PV310_PA_I2S2               0xE2A00000
 +
 +/* PCM */
 +#define S5PV310_PA_PCM0               0x03840000
 +#define S5PV310_PA_PCM1               0x13980000
 +#define S5PV310_PA_PCM2               0x13990000
 +
 +/* AC97 */
 +#define S5PV310_PA_AC97               0x139A0000
 +
  #define S5PV310_PA_UART                       (0x13800000)
  
  #define S5P_PA_UART(x)                        (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET))
index 62c4d6204d2a036f0b6f4fdeea0c745530f96edd,62956d3488b1dc6a8975dad584746ecdcd9936ca..f3bc283df1195e7c603ee4e379768a07cad25884
  #include <plat/cpu.h>
  #include <plat/devs.h>
  #include <plat/sdhci.h>
 +#include <plat/iic.h>
  
  #include <mach/map.h>
- #include <mach/regs-srom.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
  #define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |        \
index d5eb607763f76d2ece977a227b63cbf9b8a20bc6,3426602323424e464415cd94675ecf9fa1b296b5..e4a826ac3c1de4b38b590856d04a86031475bd27
  #include <plat/cpu.h>
  #include <plat/devs.h>
  #include <plat/sdhci.h>
 +#include <plat/iic.h>
  
  #include <mach/map.h>
- #include <mach/regs-srom.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
  #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |        \