powerpc/prom: early_init_dt_scan_cpus() updates cpu features only once
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Fri, 28 Mar 2014 02:36:28 +0000 (13:36 +1100)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Mon, 7 Apr 2014 00:33:14 +0000 (10:33 +1000)
All our cpu feature updates were done for every CPU in the device-tree,
thus overwriting the cputable bits over and over again. Instead do them
only for the boot CPU.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
arch/powerpc/kernel/prom.c

index ea50a7ecd81b333e2e0dd52c5a51f4440220170d..668aa4791fd753ec01092195bd7b0effb94ff9ac 100644 (file)
@@ -347,33 +347,34 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
 #endif
        }
 
-       if (found >= 0) {
-               DBG("boot cpu: logical %d physical %d\n", found,
-                       be32_to_cpu(intserv[found_thread]));
-               boot_cpuid = found;
-               set_hard_smp_processor_id(found,
-                       be32_to_cpu(intserv[found_thread]));
+       /* Not the boot CPU */
+       if (found < 0)
+               return 0;
 
-               /*
-                * PAPR defines "logical" PVR values for cpus that
-                * meet various levels of the architecture:
-                * 0x0f000001   Architecture version 2.04
-                * 0x0f000002   Architecture version 2.05
-                * If the cpu-version property in the cpu node contains
-                * such a value, we call identify_cpu again with the
-                * logical PVR value in order to use the cpu feature
-                * bits appropriate for the architecture level.
-                *
-                * A POWER6 partition in "POWER6 architected" mode
-                * uses the 0x0f000002 PVR value; in POWER5+ mode
-                * it uses 0x0f000001.
-                */
-               prop = of_get_flat_dt_prop(node, "cpu-version", NULL);
-               if (prop && (be32_to_cpup(prop) & 0xff000000) == 0x0f000000)
-                       identify_cpu(0, be32_to_cpup(prop));
+       DBG("boot cpu: logical %d physical %d\n", found,
+           be32_to_cpu(intserv[found_thread]));
+       boot_cpuid = found;
+       set_hard_smp_processor_id(found, be32_to_cpu(intserv[found_thread]));
 
-               identical_pvr_fixup(node);
-       }
+       /*
+        * PAPR defines "logical" PVR values for cpus that
+        * meet various levels of the architecture:
+        * 0x0f000001   Architecture version 2.04
+        * 0x0f000002   Architecture version 2.05
+        * If the cpu-version property in the cpu node contains
+        * such a value, we call identify_cpu again with the
+        * logical PVR value in order to use the cpu feature
+        * bits appropriate for the architecture level.
+        *
+        * A POWER6 partition in "POWER6 architected" mode
+        * uses the 0x0f000002 PVR value; in POWER5+ mode
+        * it uses 0x0f000001.
+        */
+       prop = of_get_flat_dt_prop(node, "cpu-version", NULL);
+       if (prop && (be32_to_cpup(prop) & 0xff000000) == 0x0f000000)
+               identify_cpu(0, be32_to_cpup(prop));
+
+       identical_pvr_fixup(node);
 
        check_cpu_feature_properties(node);
        check_cpu_pa_features(node);
@@ -385,7 +386,6 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
        else
                cur_cpu_spec->cpu_features &= ~CPU_FTR_SMT;
 #endif
-
        return 0;
 }