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More .set to keep 32-bit processors happy.
authorRalf Baechle <ralf@linux-mips.org>
Wed, 29 Jun 2005 13:35:19 +0000 (13:35 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Sat, 29 Oct 2005 18:31:33 +0000 (19:31 +0100)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
include/asm-mips/system.h patch | blob | blame | history

diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 30c7ec1675cae79d65161a55266e434ed45d0337..36f34d8ddfac7de264e6d5ad2cab45f3a499b3eb 100644 (file)
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -178,7 +178,9 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
                __asm__ __volatile__(
                "       .set    mips3                                   \n"
                "1:     ll      %0, %3                  # xchg_u32      \n"
+               "       .set    mips0                                   \n"
                "       move    %2, %z4                                 \n"
+               "       .set    mips3                                   \n"
                "       sc      %2, %1                                  \n"
                "       beqzl   %2, 1b                                  \n"
                ROT_IN_PIECES
@@ -195,7 +197,9 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
                __asm__ __volatile__(
                "       .set    mips3                                   \n"
                "1:     ll      %0, %3                  # xchg_u32      \n"
+               "       .set    mips0                                   \n"
                "       move    %2, %z4                                 \n"
+               "       .set    mips3                                   \n"
                "       sc      %2, %1                                  \n"
                "       beqz    %2, 1b                                  \n"
 #ifdef CONFIG_SMP