ARM: dts: sun8i: a83t: Correct USB3503 GPIOs polarity
authorMarek Szyprowski <m.szyprowski@samsung.com>
Wed, 11 Dec 2019 14:52:17 +0000 (15:52 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 5 Feb 2020 14:18:17 +0000 (14:18 +0000)
[ Upstream commit 1c226017d3ec93547b58082bdf778d9db7401c95 ]

Current USB3503 driver ignores GPIO polarity and always operates as if the
GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing
USB3503 chip applications to match the chip specification and common
convention for naming the pins. The only pin, which has to be ACTIVE_LOW
is the reset pin. The remaining are ACTIVE_HIGH. This change allows later
to fix the USB3503 driver to properly use generic GPIO bindings and read
polarity from DT.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts

index 716a205c6dbbeca282efbe4498742634205ad8bd..1fed3231f5c18df0e73f73d47b41517121cd7e30 100644 (file)
@@ -90,7 +90,7 @@
                initial-mode = <1>; /* initialize in HUB mode */
                disabled-ports = <1>;
                intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
-               reset-gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */
+               reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
                connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
                refclk-frequency = <19200000>;
        };