Blackfin: rewrite resync_core_{i,d}cache() SMP logic to avoid per_cpu data
authorGraf Yang <graf.yang@analog.com>
Mon, 1 Feb 2010 06:07:50 +0000 (06:07 +0000)
committerMike Frysinger <vapier@gentoo.org>
Tue, 9 Mar 2010 05:30:50 +0000 (00:30 -0500)
This functions are implicitly called by core functions like cpu_relax(),
and since those functions may be called early on before common code has
initialized the per-cpu data area, we need to tweak the stats gathering.
Now the statistics are maintained in common bss which makes these funcs
safe to use as soon as the C runtime env is setup.

Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
arch/blackfin/include/asm/cpu.h
arch/blackfin/include/asm/smp.h
arch/blackfin/kernel/setup.c
arch/blackfin/mach-common/smp.c

index b191dc662bd802076587e30a31cbca61beef7a7c..16883e582e3cd96ce9a914242837f877e3a77f16 100644 (file)
@@ -17,8 +17,6 @@ struct blackfin_cpudata {
        struct task_struct *idle;
        unsigned int imemctl;
        unsigned int dmemctl;
-       unsigned long dcache_invld_count;
-       unsigned long icache_invld_count;
 };
 
 DECLARE_PER_CPU(struct blackfin_cpudata, cpu_data);
index 7f26de09ca9cd53cc7e922bbfaa16022f718a141..f5b537967116d151c828eac66b2166b3d5f179eb 100644 (file)
@@ -24,6 +24,13 @@ struct corelock_slot {
 };
 extern struct corelock_slot corelock;
 
+#ifdef __ARCH_SYNC_CORE_ICACHE
+extern unsigned long icache_invld_count[NR_CPUS];
+#endif
+#ifdef __ARCH_SYNC_CORE_DCACHE
+extern unsigned long dcache_invld_count[NR_CPUS];
+#endif
+
 void smp_icache_flush_range_others(unsigned long start,
                                   unsigned long end);
 #ifdef CONFIG_HOTPLUG_CPU
index b54ba45db5f1215d0950f2fad7c6e856dd332a1a..8e2efceb364b8752b48ae63c97451ee0ee58a629 100644 (file)
@@ -1239,10 +1239,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                   dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
                   BFIN_DLINES);
 #ifdef __ARCH_SYNC_CORE_DCACHE
-       seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
+       seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", dcache_invld_count[cpu_num]);
 #endif
 #ifdef __ARCH_SYNC_CORE_ICACHE
-       seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count);
+       seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", icache_invld_count[cpu_num]);
 #endif
 
        if (cpu_num != num_possible_cpus() - 1)
index efc47ffd066d6cdcc1c7d430065824991870acba..7803f22d2ca73039cb83ef0d229a0f76bf1cbf79 100644 (file)
@@ -474,24 +474,26 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end)
 EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
 
 #ifdef __ARCH_SYNC_CORE_ICACHE
+unsigned long icache_invld_count[NR_CPUS];
 void resync_core_icache(void)
 {
        unsigned int cpu = get_cpu();
        blackfin_invalidate_entire_icache();
-       ++per_cpu(cpu_data, cpu).icache_invld_count;
+       icache_invld_count[cpu]++;
        put_cpu();
 }
 EXPORT_SYMBOL(resync_core_icache);
 #endif
 
 #ifdef __ARCH_SYNC_CORE_DCACHE
+unsigned long dcache_invld_count[NR_CPUS];
 unsigned long barrier_mask __attribute__ ((__section__(".l2.bss")));
 
 void resync_core_dcache(void)
 {
        unsigned int cpu = get_cpu();
        blackfin_invalidate_entire_dcache();
-       ++per_cpu(cpu_data, cpu).dcache_invld_count;
+       dcache_invld_count[cpu]++;
        put_cpu();
 }
 EXPORT_SYMBOL(resync_core_dcache);