drm/i915: Pass dev_priv to intel_suspend_hw()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 31 Oct 2016 20:37:23 +0000 (22:37 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 1 Nov 2016 14:40:38 +0000 (16:40 +0200)
Unify our approach to things by passing around dev_priv instead of dev.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1477946245-14134-25-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_pm.c

index f83dde9e36d11df7c9f53176bbb4fb470617ba96..48f4d210baf6f54aa9591a37d8473513dfec76a0 100644 (file)
@@ -1435,7 +1435,7 @@ static int i915_drm_suspend(struct drm_device *dev)
 
        intel_suspend_encoders(dev_priv);
 
-       intel_suspend_hw(dev);
+       intel_suspend_hw(dev_priv);
 
        i915_gem_suspend_gtt_mappings(dev);
 
index 3a9ca2755829fbedf75e574c672558500dc4f2d7..8765f8d5366cf0eb41569ee13ecc7dca28703ccf 100644 (file)
@@ -1704,7 +1704,7 @@ bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
 
 /* intel_pm.c */
 void intel_init_clock_gating(struct drm_i915_private *dev_priv);
-void intel_suspend_hw(struct drm_device *dev);
+void intel_suspend_hw(struct drm_i915_private *dev_priv);
 int ilk_wm_max_level(const struct drm_i915_private *dev_priv);
 void intel_update_watermarks(struct intel_crtc *crtc);
 void intel_init_pm(struct drm_device *dev);
index 3e9bc2ac26b440b5d29a794685034ea849263161..8c5fb8f6af1080de74891d1d27c84cf7b55405db 100644 (file)
@@ -7139,10 +7139,8 @@ static void lpt_init_clock_gating(struct drm_i915_private *dev_priv)
                   TRANS_CHICKEN1_DP0UNIT_GC_DISABLE);
 }
 
-static void lpt_suspend_hw(struct drm_device *dev)
+static void lpt_suspend_hw(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
-
        if (HAS_PCH_LPT_LP(dev_priv)) {
                uint32_t val = I915_READ(SOUTH_DSPCLK_GATE_D);
 
@@ -7626,10 +7624,10 @@ void intel_init_clock_gating(struct drm_i915_private *dev_priv)
        dev_priv->display.init_clock_gating(dev_priv);
 }
 
-void intel_suspend_hw(struct drm_device *dev)
+void intel_suspend_hw(struct drm_i915_private *dev_priv)
 {
-       if (HAS_PCH_LPT(to_i915(dev)))
-               lpt_suspend_hw(dev);
+       if (HAS_PCH_LPT(dev_priv))
+               lpt_suspend_hw(dev_priv);
 }
 
 static void nop_init_clock_gating(struct drm_i915_private *dev_priv)