drm/i915: Report the actual swizzling back to userspace
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 24 Oct 2014 11:11:11 +0000 (12:11 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 7 Nov 2014 17:42:01 +0000 (18:42 +0100)
Userspace cares about whether or not swizzling depends on the page
address for its direct access into bound objects. Extend the get_tiling
ioctl to report the physical swizzling value in addition to the logical
swizzling value so that userspace can accurately determine when it is
possible for manual detiling.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Akash Goel <akash.goel@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Testcase: igt/gem_tiled_wc
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem_tiling.c
include/uapi/drm/i915_drm.h

index d1e7a3e088aae58922a1162f3ebf2cb8739fe78a..749ab485569e712e538d74e69110609fd0eb5dd8 100644 (file)
@@ -458,6 +458,7 @@ i915_gem_get_tiling(struct drm_device *dev, void *data,
        }
 
        /* Hide bit 17 from the user -- see comment in i915_gem_set_tiling */
+       args->phys_swizzle_mode = args->swizzle_mode;
        if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_17)
                args->swizzle_mode = I915_BIT_6_SWIZZLE_9;
        if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_10_17)
index ff57f07c32498933be7be28d874fb09a164f5b04..2ec0efcaa7197e9fe10de889acc6e54bb0abf9b6 100644 (file)
@@ -876,6 +876,12 @@ struct drm_i915_gem_get_tiling {
         * mmap mapping.
         */
        __u32 swizzle_mode;
+
+       /**
+        * Returned address bit 6 swizzling required for CPU access through
+        * mmap mapping whilst bound.
+        */
+       __u32 phys_swizzle_mode;
 };
 
 struct drm_i915_gem_get_aperture {