clocksource: sti: Provide support for the ST LPC Clocksource IP

This IP is shared with Watchdog and RTC functionality.  All 3 of
these devices are mutually exclusive from one another i.e. Only 1
IP can be used at any given time.  We use the device-driver model
combined with a DT 'mode' property to enforce this.

The ST LPC Clocksource IP can be used as the system (tick) timer.

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 4e57730e0be4e919203e21e070fb43666bb7b61d..ae3ec9da0d153525cade63a6b883a4b2f623fdb2 100644 (file)
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -293,4 +293,12 @@ config CLKSRC_IMX_GPT
        depends on ARM && CLKDEV_LOOKUP
        select CLKSRC_MMIO
 
+config CLKSRC_ST_LPC
+       bool
+       depends on ARCH_STI
+       select CLKSRC_OF if OF
+       help
+         Enable this option to use the Low Power controller timer
+         as clocksource.
+
 endmenu

diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index f228354961ca6f853a193f39b0a5fa2a63e47cd4..1c2c9d2cd85997e206a25693cfcf0f02782a4d29 100644 (file)
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -60,3 +60,4 @@ obj-$(CONFIG_ASM9260_TIMER)           += asm9260_timer.o
 obj-$(CONFIG_H8300)                    += h8300_timer8.o
 obj-$(CONFIG_H8300_TMR16)              += h8300_timer16.o
 obj-$(CONFIG_H8300_TPU)                        += h8300_tpu.o
+obj-$(CONFIG_CLKSRC_ST_LPC)            += clksrc_st_lpc.o

diff --git a/drivers/clocksource/clksrc_st_lpc.c b/drivers/clocksource/clksrc_st_lpc.c
new file mode 100644 (file)
index 0000000..f38cf33
--- /dev/null
+++ b/drivers/clocksource/clksrc_st_lpc.c
@@ -0,0 +1,123 @@
+/*
+ * Clocksource using the Low Power Timer found in the Low Power Controller (LPC)
+ *
+ * Copyright (C) 2015 STMicroelectronics – All Rights Reserved
+ *
+ * Author(s): Francesco Virlinzi <francesco.virlinzi@st.com>
+ *           Ajit Pal Singh <ajitpal.singh@st.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/clk.h>
+#include <linux/clocksource.h>
+#include <linux/init.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+
+#include <dt-bindings/mfd/st-lpc.h>
+
+/* Low Power Timer */
+#define LPC_LPT_LSB_OFF                0x400
+#define LPC_LPT_MSB_OFF                0x404
+#define LPC_LPT_START_OFF      0x408
+
+static struct st_clksrc_ddata {
+       struct clk              *clk;
+       void __iomem            *base;
+} ddata;
+
+static void __init st_clksrc_reset(void)
+{
+       writel_relaxed(0, ddata.base + LPC_LPT_START_OFF);
+       writel_relaxed(0, ddata.base + LPC_LPT_MSB_OFF);
+       writel_relaxed(0, ddata.base + LPC_LPT_LSB_OFF);
+       writel_relaxed(1, ddata.base + LPC_LPT_START_OFF);
+}
+
+static int __init st_clksrc_init(void)
+{
+       unsigned long rate;
+       int ret;
+
+       st_clksrc_reset();
+
+       rate = clk_get_rate(ddata.clk);
+
+       ret = clocksource_mmio_init(ddata.base + LPC_LPT_LSB_OFF,
+                                   "clksrc-st-lpc", rate, 300, 32,
+                                   clocksource_mmio_readl_up);
+       if (ret) {
+               pr_err("clksrc-st-lpc: Failed to register clocksource\n");
+               return ret;
+       }
+
+       return 0;
+}
+
+static int __init st_clksrc_setup_clk(struct device_node *np)
+{
+       struct clk *clk;
+
+       clk = of_clk_get(np, 0);
+       if (IS_ERR(clk)) {
+               pr_err("clksrc-st-lpc: Failed to get LPC clock\n");
+               return PTR_ERR(clk);
+       }
+
+       if (clk_prepare_enable(clk)) {
+               pr_err("clksrc-st-lpc: Failed to enable LPC clock\n");
+               return -EINVAL;
+       }
+
+       if (!clk_get_rate(clk)) {
+               pr_err("clksrc-st-lpc: Failed to get LPC clock rate\n");
+               clk_disable_unprepare(clk);
+               return -EINVAL;
+       }
+
+       ddata.clk = clk;
+
+       return 0;
+}
+
+static void __init st_clksrc_of_register(struct device_node *np)
+{
+       int ret;
+       uint32_t mode;
+
+       ret = of_property_read_u32(np, "st,lpc-mode", &mode);
+       if (ret) {
+               pr_err("clksrc-st-lpc: An LPC mode must be provided\n");
+               return;
+       }
+
+       /* LPC can either run as a Clocksource or in RTC or WDT mode */
+       if (mode != ST_LPC_MODE_CLKSRC)
+               return;
+
+       ddata.base = of_iomap(np, 0);
+       if (!ddata.base) {
+               pr_err("clksrc-st-lpc: Unable to map iomem\n");
+               return;
+       }
+
+       if (st_clksrc_setup_clk(np)) {
+               iounmap(ddata.base);
+               return;
+       }
+
+       if (st_clksrc_init()) {
+               clk_disable_unprepare(ddata.clk);
+               clk_put(ddata.clk);
+               iounmap(ddata.base);
+               return;
+       }
+
+       pr_info("clksrc-st-lpc: clocksource initialised - running @ %luHz\n",
+               clk_get_rate(ddata.clk));
+}
+CLOCKSOURCE_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register);