mmc: dw_mmc: use macro for HCON register operations

This patch add some macros for HCON register operations
to make code more readable.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 7fe0315142e6f080f90fde76f5607e436f0289a0..6e600e875328a2cc5783e695727688cd9f6d5aba 100644 (file)
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -2669,7 +2669,7 @@ static void dw_mci_init_dma(struct dw_mci *host)
                * Check ADDR_CONFIG bit in HCON to find
                * IDMAC address bus width
                */
-               addr_config = (mci_readl(host, HCON) >> 27) & 0x01;
+               addr_config = SDMMC_GET_ADDR_CONFIG(mci_readl(host, HCON));
 
                if (addr_config == 1) {
                        /* host supports IDMAC in 64-bit address mode */
@@ -3046,7 +3046,7 @@ int dw_mci_probe(struct dw_mci *host)
         * Get the host data width - this assumes that HCON has been set with
         * the correct values.
         */
-       i = (mci_readl(host, HCON) >> 7) & 0x7;
+       i = SDMMC_GET_HDATA_WIDTH(mci_readl(host, HCON));
        if (!i) {
                host->push_data = dw_mci_push_data16;
                host->pull_data = dw_mci_pull_data16;
@@ -3128,7 +3128,7 @@ int dw_mci_probe(struct dw_mci *host)
        if (host->pdata->num_slots)
                host->num_slots = host->pdata->num_slots;
        else
-               host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1;
+               host->num_slots = SDMMC_GET_SLOT_NUM(mci_readl(host, HCON));
 
        /*
         * Enable interrupts for command done, data over, data empty,

diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index 811d4673a1c582e160985a417ab9386ccf270394..f2a88d4bcbac8e7621f7aed1c82dbe1818642358 100644 (file)
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -154,6 +154,9 @@
 #define DMA_INTERFACE_GDMA             (0x2)
 #define DMA_INTERFACE_NODMA            (0x3)
 #define SDMMC_GET_TRANS_MODE(x)                (((x)>>16) & 0x3)
+#define SDMMC_GET_SLOT_NUM(x)          ((((x)>>1) & 0x1F) + 1)
+#define SDMMC_GET_HDATA_WIDTH(x)       (((x)>>7) & 0x7)
+#define SDMMC_GET_ADDR_CONFIG(x)       (((x)>>27) & 0x1)
 /* Internal DMAC interrupt defines */
 #define SDMMC_IDMAC_INT_AI             BIT(9)
 #define SDMMC_IDMAC_INT_NI             BIT(8)