DaVinci: move AEMIF #define's to the proper headers
authorSergei Shtylyov <sshtylyov@ru.mvista.com>
Fri, 16 Apr 2010 17:29:11 +0000 (21:29 +0400)
committerKevin Hilman <khilman@deeprootsystems.com>
Thu, 6 May 2010 22:02:06 +0000 (15:02 -0700)
Currently each DaVinci board file #define's its own version of the EMIFA base
addresses (all named DAVINCI_ASYNC_EMIF_*_BASE), which leads to duplication.
Move these #define's to the SoC specific headers, changing their prefixes from
'DAVINCI' to the 'DM355', 'DM644X', and 'DM646X' since all these base addresses
are SoC specific...

And while at it, rename DM646X_ASYNC_EMIF_DATA_CE0_BASE to
DM646X_ASYNC_EMIF_CS2_SPACE_BASE in order to match the DM646x datasheet.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
arch/arm/mach-davinci/board-dm355-evm.c
arch/arm/mach-davinci/board-dm355-leopard.c
arch/arm/mach-davinci/board-dm365-evm.c
arch/arm/mach-davinci/board-dm644x-evm.c
arch/arm/mach-davinci/board-dm646x-evm.c
arch/arm/mach-davinci/board-neuros-osd2.c
arch/arm/mach-davinci/board-sffsdr.c
arch/arm/mach-davinci/include/mach/dm355.h
arch/arm/mach-davinci/include/mach/dm365.h
arch/arm/mach-davinci/include/mach/dm644x.h
arch/arm/mach-davinci/include/mach/dm646x.h

index aa48e3f69715b2163f6d4175e8264cf022dca4ac..a0ad7d9f5c8558b7da8ec575e15e1811cb1e4a61 100644 (file)
@@ -33,9 +33,6 @@
 #include <mach/mmc.h>
 #include <mach/usb.h>
 
-#define DAVINCI_ASYNC_EMIF_CONTROL_BASE                0x01e10000
-#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE       0x02000000
-
 /* NOTE:  this is geared for the standard config, with a socketed
  * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
  * swap chips, maybe with a different block size, partitioning may
@@ -86,12 +83,12 @@ static struct davinci_nand_pdata davinci_nand_data = {
 
 static struct resource davinci_nand_resources[] = {
        {
-               .start          = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
+               .start          = DM355_ASYNC_EMIF_DATA_CE0_BASE,
+               .end            = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
                .flags          = IORESOURCE_MEM,
        }, {
-               .start          = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+               .start          = DM355_ASYNC_EMIF_CONTROL_BASE,
+               .end            = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
                .flags          = IORESOURCE_MEM,
        },
 };
index 21f32eb41e8c535c31a3539bc221cdd2203f32f4..c3d5a70a7f384ec8b7d534d516225c6675050d54 100644 (file)
@@ -30,9 +30,6 @@
 #include <mach/mmc.h>
 #include <mach/usb.h>
 
-#define DAVINCI_ASYNC_EMIF_CONTROL_BASE                0x01e10000
-#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE       0x02000000
-
 /* NOTE:  this is geared for the standard config, with a socketed
  * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
  * swap chips, maybe with a different block size, partitioning may
@@ -82,12 +79,12 @@ static struct davinci_nand_pdata davinci_nand_data = {
 
 static struct resource davinci_nand_resources[] = {
        {
-               .start          = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
+               .start          = DM355_ASYNC_EMIF_DATA_CE0_BASE,
+               .end            = DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
                .flags          = IORESOURCE_MEM,
        }, {
-               .start          = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+               .start          = DM355_ASYNC_EMIF_CONTROL_BASE,
+               .end            = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
                .flags          = IORESOURCE_MEM,
        },
 };
index df4ab2105869c284ae39902538d51fe1c6074f43..b98b35c9e0e27fc6a2151fe130e3db8bd5b79e55 100644 (file)
@@ -54,11 +54,6 @@ static inline int have_tvp7002(void)
        return 0;
 }
 
-
-#define DM365_ASYNC_EMIF_CONTROL_BASE  0x01d10000
-#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
-#define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
-
 #define DM365_EVM_PHY_MASK             (0x2)
 #define DM365_EVM_MDIO_FREQUENCY       (2200000) /* PHY bus frequency */
 
index 95cef1f46ef2af08e63f8d9619eee213c63665f1..d028bab6f9813ae12721fc087926d77887f719be 100644 (file)
 
 #define DAVINCI_CFC_ATA_BASE             0x01C66000
 
-#define DAVINCI_ASYNC_EMIF_CONTROL_BASE   0x01e00000
-#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE  0x02000000
-#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE  0x04000000
-#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE  0x06000000
-#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE  0x08000000
-
 #define LXT971_PHY_ID  (0x001378e2)
 #define LXT971_PHY_MASK        (0xfffffff0)
 
@@ -92,8 +86,8 @@ static struct physmap_flash_data davinci_evm_norflash_data = {
 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
  * limits addresses to 16M, so using addresses past 16M will wrap */
 static struct resource davinci_evm_norflash_resource = {
-       .start          = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
-       .end            = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
+       .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
+       .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
        .flags          = IORESOURCE_MEM,
 };
 
@@ -154,12 +148,12 @@ static struct davinci_nand_pdata davinci_evm_nandflash_data = {
 
 static struct resource davinci_evm_nandflash_resource[] = {
        {
-               .start          = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
+               .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
+               .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
                .flags          = IORESOURCE_MEM,
        }, {
-               .start          = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+               .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
+               .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
                .flags          = IORESOURCE_MEM,
        },
 };
index 5ba3cb2daaa0d71bc8a57a403ab2272b1e515232..b22e22cefcdd3a8e627fff46a83469e7b79952ce 100644 (file)
@@ -80,17 +80,14 @@ static struct davinci_nand_pdata davinci_nand_data = {
        .options                = 0,
 };
 
-#define DAVINCI_ASYNC_EMIF_CONTROL_BASE                0x20008000
-#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE       0x42000000
-
 static struct resource davinci_nand_resources[] = {
        {
-               .start          = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
+               .start          = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
+               .end            = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
                .flags          = IORESOURCE_MEM,
        }, {
-               .start          = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+               .start          = DM646X_ASYNC_EMIF_CONTROL_BASE,
+               .end            = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
                .flags          = IORESOURCE_MEM,
        },
 };
index 1fadc68d9fbb37a8db9832d922be61f517169564..5afe37e3a4cbd9283c5eb11a271550be0d381412 100644 (file)
@@ -43,9 +43,6 @@
 
 #define DAVINCI_CFC_ATA_BASE            0x01C66000
 
-#define DAVINCI_ASYNC_EMIF_CONTROL_BASE         0x01e00000
-#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
-
 #define LXT971_PHY_ID                  0x001378e2
 #define LXT971_PHY_MASK                        0xfffffff0
 
@@ -98,12 +95,12 @@ static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
 
 static struct resource davinci_ntosd2_nandflash_resource[] = {
        {
-               .start          = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
+               .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
+               .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
                .flags          = IORESOURCE_MEM,
        }, {
-               .start          = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+               .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
+               .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
                .flags          = IORESOURCE_MEM,
        },
 };
index a7cf810bb13e35cecf49e7ef564284c1c29351d8..1ed0662cc0e499f1a17bb94dd52b55c90ff2812e 100644 (file)
@@ -45,9 +45,6 @@
 #define SFFSDR_PHY_MASK                (0x2)
 #define SFFSDR_MDIO_FREQUENCY  (2200000) /* PHY bus frequency */
 
-#define DAVINCI_ASYNC_EMIF_CONTROL_BASE   0x01e00000
-#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE  0x02000000
-
 static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
        /* U-Boot Environment: Block 0
         * UBL:                Block 1
@@ -76,12 +73,12 @@ static struct flash_platform_data davinci_sffsdr_nandflash_data = {
 
 static struct resource davinci_sffsdr_nandflash_resource[] = {
        {
-               .start          = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
+               .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
+               .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
                .flags          = IORESOURCE_MEM,
        }, {
-               .start          = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
-               .end            = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+               .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
+               .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
                .flags          = IORESOURCE_MEM,
        },
 };
index 85536d8e8336dd2b127ea8ca908298bae36afd54..36dff4a0ce3f93ce9e0982713085b2c7285bcc02 100644 (file)
@@ -15,6 +15,9 @@
 #include <mach/asp.h>
 #include <media/davinci/vpfe_capture.h>
 
+#define DM355_ASYNC_EMIF_CONTROL_BASE  0x01E10000
+#define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
+
 #define ASP1_TX_EVT_EN 1
 #define ASP1_RX_EVT_EN 2
 
index 3a37b5a6983ca034bd91bebf2a53a6ac3c0bff7e..ea5df3b49ec4ec1f936ee2acd9be6c0776dd494d 100644 (file)
 #define DAVINCI_DMA_VC_TX              2
 #define DAVINCI_DMA_VC_RX              3
 
+#define DM365_ASYNC_EMIF_CONTROL_BASE  0x01D10000
+#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
+#define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
+
 void __init dm365_init(void);
 void __init dm365_init_asp(struct snd_platform_data *pdata);
 void __init dm365_init_vc(struct snd_platform_data *pdata);
index 1a8b09ccc3c8493bcf94a7001b9cc871a79afa43..6fca568a0fd25c2e01a86f9416b337f3e1ac1f6c 100644 (file)
 #define DM644X_EMAC_MDIO_OFFSET                (0x4000)
 #define DM644X_EMAC_CNTRL_RAM_SIZE     (0x2000)
 
+#define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000
+#define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
+#define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
+#define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
+#define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
+
 void __init dm644x_init(void);
 void __init dm644x_init_asp(struct snd_platform_data *pdata);
 void dm644x_set_vpfe_config(struct vpfe_config *cfg);
index 846da98b619af4f41e56039520e92c6e5372a390..4d62db7b6f94bae6887a322d6fdc74f2466158f4 100644 (file)
@@ -27,6 +27,9 @@
 
 #define DM646X_ATA_REG_BASE            (0x01C66000)
 
+#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000
+#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
+
 void __init dm646x_init(void);
 void __init dm646x_init_ide(void);
 void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);