ARM: ARMv7-M: implement read_cpuid_ext

On v7-M the extended cpuid registers are not available from CP15 but they
are memory mapped in the System Control Space.
There isn't an equivalent available for CPUID_{CACHETYPE,TCM,TLBTYPE,MPIDR}.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 4eb94a3add3c76797ef557c61da1566fac5d388b..ec635ff32f493d872a4aed9a488ba6a574c9eb29 100644 (file)
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -10,6 +10,22 @@
 #define CPUID_TLBTYPE  3
 #define CPUID_MPIDR    5
 
+#ifdef CONFIG_CPU_V7M
+#define CPUID_EXT_PFR0 0x40
+#define CPUID_EXT_PFR1 0x44
+#define CPUID_EXT_DFR0 0x48
+#define CPUID_EXT_AFR0 0x4c
+#define CPUID_EXT_MMFR0        0x50
+#define CPUID_EXT_MMFR1        0x54
+#define CPUID_EXT_MMFR2        0x58
+#define CPUID_EXT_MMFR3        0x5c
+#define CPUID_EXT_ISAR0        0x60
+#define CPUID_EXT_ISAR1        0x64
+#define CPUID_EXT_ISAR2        0x68
+#define CPUID_EXT_ISAR3        0x6c
+#define CPUID_EXT_ISAR4        0x70
+#define CPUID_EXT_ISAR5        0x74
+#else
 #define CPUID_EXT_PFR0 "c1, 0"
 #define CPUID_EXT_PFR1 "c1, 1"
 #define CPUID_EXT_DFR0 "c1, 2"
@@ -24,6 +40,7 @@
 #define CPUID_EXT_ISAR3        "c2, 3"
 #define CPUID_EXT_ISAR4        "c2, 4"
 #define CPUID_EXT_ISAR5        "c2, 5"
+#endif
 
 #define MPIDR_SMP_BITMASK (0x3 << 30)
 #define MPIDR_SMP_VALUE (0x2 << 30)
@@ -79,7 +96,23 @@ extern unsigned int processor_id;
                __val;                                                  \
        })
 
-#else /* ifdef CONFIG_CPU_CP15 */
+#elif defined(CONFIG_CPU_V7M)
+
+#include <asm/io.h>
+#include <asm/v7m.h>
+
+#define read_cpuid(reg)                                                        \
+       ({                                                              \
+               WARN_ON_ONCE(1);                                        \
+               0;                                                      \
+       })
+
+static inline unsigned int __attribute_const__ read_cpuid_ext(unsigned offset)
+{
+       return readl(BASEADDR_V7M_SCB + offset);
+}
+
+#else /* ifdef CONFIG_CPU_CP15 / elif defined (CONFIG_CPU_V7M) */
 
 /*
  * read_cpuid and read_cpuid_ext should only ever be called on machines that
@@ -108,9 +141,6 @@ static inline unsigned int __attribute_const__ read_cpuid_id(void)
 
 #elif defined(CONFIG_CPU_V7M)
 
-#include <asm/io.h>
-#include <asm/v7m.h>
-
 static inline unsigned int __attribute_const__ read_cpuid_id(void)
 {
        return readl(BASEADDR_V7M_SCB + V7M_SCB_CPUID);

diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 000499cfceb3e93ed36f103cb1bceb1af975013d..0c93588fcb91b4a74791534e5db93be9c578e5ce 100644 (file)
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -144,7 +144,7 @@ __v7m_proc_info:
        b       __v7m_setup             @ proc_info_list.__cpu_flush
        .long   cpu_arch_name
        .long   cpu_elf_name
-       .long   HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_IDIVT
+       .long   HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT
        .long   cpu_v7m_name
        .long   v7m_processor_functions @ proc_info_list.proc
        .long   0                       @ proc_info_list.tlb