can: flexcan: enable interrupts atomically at the end of flexcan_chip_start()

This patch defers the writing of the interrupts bits of the CTRL register order
to enables all interrupts atomically at the the of the flexcan_chip_start()
function.

Suggested-by: Torsten Lang <torsten.lang@uweschneider.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 28b6283aacf22c635d37163e06fed4c425339bca..868fe945e35a39786bf15fb8b142c36a720179a5 100644 (file)
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -878,6 +878,8 @@ static int flexcan_chip_start(struct net_device *dev)
 
        /* save for later use */
        priv->reg_ctrl_default = reg_ctrl;
+       /* leave interrupts disabled for now */
+       reg_ctrl &= ~FLEXCAN_CTRL_ERR_ALL;
        netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);
        flexcan_write(reg_ctrl, &regs->ctrl);
 
@@ -937,8 +939,11 @@ static int flexcan_chip_start(struct net_device *dev)
 
        priv->can.state = CAN_STATE_ERROR_ACTIVE;
 
-       /* enable FIFO interrupts */
+       /* enable interrupts atomically */
+       disable_irq(dev->irq);
+       flexcan_write(priv->reg_ctrl_default, &regs->ctrl);
        flexcan_write(FLEXCAN_IFLAG_DEFAULT, &regs->imask1);
+       enable_irq(dev->irq);
 
        /* print chip status */
        netdev_dbg(dev, "%s: reading mcr=0x%08x ctrl=0x%08x\n", __func__,