drivers/usb/host/fsl: Port USB EHCI host driver for LS102xA

Change Power architecture specific APIs such as in_be32/out_be32
for registers read/write. Instead using ioread/writebe32 which are
defined for power as well as arm architecture

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Sriram Dash <sriram.dash@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 3b6eb219de1a714d31fc843718472efc6ab615f4..9f5ffb62997303dedd1d6c7d929191992a039c81 100644 (file)
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -35,6 +35,7 @@
 #include <linux/usb/otg.h>
 #include <linux/platform_device.h>
 #include <linux/fsl_devices.h>
+#include <linux/of_platform.h>
 
 #include "ehci.h"
 #include "ehci-fsl.h"
@@ -241,7 +242,8 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
         * to portsc
         */
        if (pdata->check_phy_clk_valid) {
-               if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID)) {
+               if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
+                   PHY_CLK_VALID)) {
                        dev_warn(hcd->self.controller,
                                 "USB PHY clock invalid\n");
                        return -EINVAL;
@@ -273,9 +275,11 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 
                /* Setup Snooping for all the 4GB space */
                /* SNOOP1 starts from 0x0, size 2G */
-               out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
+               iowrite32be(0x0 | SNOOP_SIZE_2GB,
+                           non_ehci + FSL_SOC_USB_SNOOP1);
                /* SNOOP2 starts from 0x80000000, size 2G */
-               out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
+               iowrite32be(0x80000000 | SNOOP_SIZE_2GB,
+                           non_ehci + FSL_SOC_USB_SNOOP2);
        }
 
        /* Deal with USB erratum A-005275 */
@@ -309,13 +313,13 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 
        if (pdata->have_sysif_regs) {
 #ifdef CONFIG_FSL_SOC_BOOKE
-               out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
-               out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
+               iowrite32be(0x00000008, non_ehci + FSL_SOC_USB_PRICTRL);
+               iowrite32be(0x00000080, non_ehci + FSL_SOC_USB_AGECNTTHRSH);
 #else
-               out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
-               out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
+               iowrite32be(0x0000000c, non_ehci + FSL_SOC_USB_PRICTRL);
+               iowrite32be(0x00000040, non_ehci + FSL_SOC_USB_AGECNTTHRSH);
 #endif
-               out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
+               iowrite32be(0x00000001, non_ehci + FSL_SOC_USB_SICTRL);
        }
 
        return 0;
@@ -554,7 +558,7 @@ static int ehci_fsl_drv_suspend(struct device *dev)
        if (!fsl_deep_sleep())
                return 0;
 
-       ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
+       ehci_fsl->usb_ctrl = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
        return 0;
 }
 
@@ -577,7 +581,7 @@ static int ehci_fsl_drv_resume(struct device *dev)
        usb_root_hub_lost_power(hcd->self.root_hub);
 
        /* Restore USB PHY settings and enable the controller. */
-       out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
+       iowrite32be(ehci_fsl->usb_ctrl, non_ehci + FSL_SOC_USB_CTRL);
 
        ehci_reset(ehci);
        ehci_fsl_reinit(ehci);