spidev supports more communications modes
authorAnton Vorontsov <avorontsov@ru.mvista.com>
Tue, 31 Jul 2007 07:38:43 +0000 (00:38 -0700)
committerLinus Torvalds <torvalds@woody.linux-foundation.org>
Tue, 31 Jul 2007 22:39:40 +0000 (15:39 -0700)
The spidev driver doesn't currently expose all SPI communications modes to
userspace.  This passes them all through to the driver.

Two of them are potentially troublesome, in the sense that they could cause
hardware conflicts on shared busses.  It might be appropriate to add some
privilege checks for for those modes.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
drivers/spi/spidev.c
include/linux/spi/spidev.h

index 38b60ad0eda0c605ec474c88bd5ca7f2f4113f40..630f781aeb190b59851324f18afeb94b343e5180 100644 (file)
 static unsigned long   minors[N_SPI_MINORS / BITS_PER_LONG];
 
 
-/* Bit masks for spi_device.mode management */
-#define SPI_MODE_MASK                  (SPI_CPHA | SPI_CPOL)
-
+/* Bit masks for spi_device.mode management.  Note that incorrect
+ * settings for CS_HIGH and 3WIRE can cause *lots* of trouble for other
+ * devices on a shared bus:  CS_HIGH, because this device will be
+ * active when it shouldn't be;  3WIRE, because when active it won't
+ * behave as it should.
+ *
+ * REVISIT should changing those two modes be privileged?
+ */
+#define SPI_MODE_MASK          (SPI_CPHA | SPI_CPOL | SPI_CS_HIGH \
+                               | SPI_LSB_FIRST | SPI_3WIRE | SPI_LOOP)
 
 struct spidev_data {
        struct device           dev;
index 7d700be57490027f8e67436c201260e49c53f591..c93ef9d42a01e48b2ad66fc3bacdf42362844ed1 100644 (file)
 #define SPI_MODE_2             (SPI_CPOL|0)
 #define SPI_MODE_3             (SPI_CPOL|SPI_CPHA)
 
+#define SPI_CS_HIGH            0x04
+#define SPI_LSB_FIRST          0x08
+#define SPI_3WIRE              0x10
+#define SPI_LOOP               0x20
 
 /*---------------------------------------------------------------------------*/